Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Evert Seevinck"'
Publikováno v:
IEEE Electron Device Letters. 20:614-617
A silicon light emitting device was designed and realized utilizing a standard 2-/spl mu/m industrial CMOS technology design and processing procedure. The device and its associated driving circuitry were integrated in a CMOS integrated circuit and ca
Publikováno v:
IEEE Journal of Solid-State Circuits. 26:525-536
The speed of VLSI chips is increasingly limited by signal delay in long interconnect lines. A simple analysis shows that major speed improvements are possible when using current-mode rather than conventional voltage-mode signal transporting technique
Publikováno v:
IEEE Journal of Solid-State Circuits. 25:150-154
An emitter coupled logic (ECL) 100 K compatible output buffer circuit fabricated in a submicrometer CMOS-only process is presented. High speed (0.9-ns delay) and sufficient precision are achieved through the use of a novel circuit principle. Negative
Publikováno v:
ISCAS (4)
As the technology scales, the global wire delay becomes a major bottleneck in realizing high performance SOCs. Apart from the technological efforts being made to overcome this problem, it is necessary to develop new circuit design techniques. This pa
Publikováno v:
Proceedings of the 30th European Solid-State Circuits Conference.
As the technology scales, on-chip interconnects are becoming more and more narrow while their height is not scaling linearly with their width. This leads to an increase in coupling capacitance with neighbouring wires, resulting in higher crosstalk. I
Publikováno v:
1999 IEEE Africon. 5th Africon Conference in Africa (Cat. No.99CH36342).
In CMOS, an SRAM cell containing six transistors is generally used. If a smaller number of transistors and fewer connection lines were possible, the packing density of SRAM chips may be improved. A reduce-area four-transistor SRAM cell for implementa
Publikováno v:
ISCAS
In CMOS, an SRAM cell containing six transistors and five routing wires is generally used. If a smaller number of transistors and/or fewer connection lines were possible, the packing density of SRAM chips may be improved. In this paper, a four-transi
Autor:
Evert Seevinck
Publikováno v:
Analog Circuit Design ISBN: 9781461286288
This paper addresses the design of translinear circuits in the context of CMOS-technology. First, extension of the translinear circuit principle to implementation by MOS transistors operating in strong inversion is reviewed.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7220ac2de46ba613e0ad0cdb5e2a5119
https://doi.org/10.1007/978-1-4613-1443-1_15
https://doi.org/10.1007/978-1-4613-1443-1_15
Autor:
Evert Seevinck
Publikováno v:
Analogue IC Design: The Current-Mode Approach ISBN: 9780863412974
In present-day information systems, signal processing is increasingly being carried out by digital VLSI integrated circuits. Broad fields of importance are ASICs and RAMs. Interface functions are required between the “real world” and the silicon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cf6b5b99110a0b60fc227acd24eed224
https://doi.org/10.1049/pbcs002e_ch12
https://doi.org/10.1049/pbcs002e_ch12
Publikováno v:
IEEE journal of solid-state circuits, 23(3), 802-815. IEEE
Two bipolar RMS-DC convertor circuits of the computing type which require no rectifier function are discussed. Improved frequency response is thus obtained. RMS-to-DC computation is carried out in the current domain. To make the circuit suitable for