Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Eric Soenen"'
Autor:
Arijit Raychowdhury, Eric Soenen, Samuel M. Palermo, Christophe Antoine, Fa Foster Dai, Hua Wang, Alessandro Piovaccari
Publikováno v:
IEEE Solid-State Circuits Magazine. 15:95-97
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:2140-2150
A digitally assisted high-current low-dropout (LDO) regulator is proposed in this article. The LDO architecture combines two main types of regulators: digital LDOs and analog LDOs. The proposed architecture uses the digital loop for tracking large ou
Publikováno v:
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Autor:
Eric Soenen, Qiyuan Liu, Jose Silva-Martinez, Chulhyun Park, Dadian Zhou, Carlos Briseno-Vidrios, Martin Kinyua, Junning Jiang
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 66:3373-3383
A pipeline analog-to-digital converter (ADC) with high power efficiency is implemented in this paper. The ADC architecture consists of 3.5b, 3.5b, 3.5b, and 4b sub-ADCs. For the first three stages, a current-reuse technique is employed in the current
Autor:
Jose Silva-Martinez, Chulhyun Park, Martin Kinyua, Suraj Prakash, Eric Soenen, Mohammad H. Naderi
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 66:3352-3364
This paper presents a 12-bit 500 MS/s pipelined ADC fabricated in the 40 nm TSMC technology, which aims to reduce the power consumption associated with residue amplifiers and comparator cells. ADC architecture employs amplifiers with minimum transcon
Autor:
Carlos Briseno-Vidrios, Dadian Zhou, Qiyuan Liu, Jose Silva-Martinez, Martin Kinyua, Suraj Prakash, Eric Soenen, Alexander Edward
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:3280-3292
A power-efficient pipeline analog-to-digital converter (ADC) architecture employing a current-mode (CM) multiplying digital-to-analog converter (MDAC) is implemented in this paper. A linear operational transconductance amplifier (OTA), a current stee
Autor:
Alan Roth, Tze-Chiang Huang, Eric Soenen, Charlie Zhou, Sheng-Yao Yang, Mei Wong, Stefan Rusu, Frank Lee, Kai-Yuan Ting, Alex Kalnitsky, Min-Jer Wang, Mark Chen, Ying-Chih Hsu, Kevin Zhang, Paul Ranucci, Ting-Yu Yeh, Hung-Chih Lin, C. H. Kuo, Alvin Leng Sun Loke, J.R. Chu
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
We demonstrate two heterogeneous solutions to improve power delivery to High-Performance Computing (HPC) processors. The scalable HPC vehicle integrates two 7nm CMOS processor chiplets, each with four ARM® Cortex®-A72 cores, that are mounted on a C
Autor:
Eric Soenen, Martin Kinyua
Publikováno v:
CICC
Ring amplifiers have emerged as scaling friendly amplification alternatives to conventional OTA-based switched capacitor residue amplifiers. To address potential instability in feedback as the supply voltage is shrunk in deep nanoscale CMOS, we merge
Publikováno v:
IEEE Journal of Solid-State Circuits. 52:1591-1604
This paper presents a high-performance digitizer based on column-parallel single-slope analog-to-digital converter (SS-ADC) topology for readout of a back-illuminated 3-D-stacked CMOS image sensor. To address the high power consumption issue in high
Autor:
Mohamed Lamine Faycal Bellaredj, Y. Mano, Arijit Raychowdhury, Don Disney, Adam Beece, Anto Kavungal Davis, Jongku Kang, Saad Bin Nasir, Madhavan Swaminathan, Hesam Fathi Moghadam, Yong Wang, Tomoharu Fuji, Eric Soenen
Publikováno v:
ISCAS
Digital LDOs enable on-chip fine-grain power management in multi-core microprocessor and system-on-a-chip platforms to increase system level energy efficiency. Their design synthesizability with automatic placement and routing can enable per-core DVF