Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Eric J. Meisenzahl"'
Autor:
Eric G. Stevens, Ryan Kather, Joseph Summa, Peter Mersich, John McCarten, James E. Doran, Douglas A. Carpenter, Shen Wang, Eric J. Meisenzahl, Robert P. Fabinski, Tom Frank, Stephen L. Kosman, Brian Tobey, Cristian Tivarus, Richard Brolly, Alden Lum, Adam DeJager
Publikováno v:
IEEE Transactions on Electron Devices. 66:1329-1337
This paper describes the design and performance of two new high-resolution interline charge-coupled device image sensors for use in industrial, machine vision, and aerial photography applications. These sensors feature 4.5- $\mu \text{m}$ pixels, 4 o
Autor:
James A. DiBella, Douglas A. Carpenter, Stephen L. Kosman, Eric J. Meisenzahl, James E. Doran, Robert P. Fabinski, John P. Mccarten
Publikováno v:
SPIE Proceedings.
This paper describes the design and performance of a new high-resolution 35 mm format CCD image sensor using an advanced 5.5 μm interline pixel. The pixels are arranged in a 6576 (H) × 4384 (V) format to support a 3:2 aspect ratio. This device is p
Autor:
Eric J. Meisenzahl, Stephen L. Kosman, Thomas R. Pian, Christopher Parks, David Newell Nichols, John P. Mccarten, Douglas A. Carpenter, James A. DiBella, Xueyuan Liu, Robert Kaser
Publikováno v:
SPIE Proceedings.
A new 5.5 mm pixel interline transfer CCD technology platform has been developed that offers significant improvements in performance while retaining the dynamic range, quantum efficiency, and responsivity available from the previous generation 7.4 µ
Autor:
Edmund K. Banghart, David Newell Nichols, Eric G. Stevens, Kwok Y. Wong, John P. Shepherd, Eric J. Meisenzahl
Publikováno v:
Digital Photography
This paper describes the design and performance of two new high-resolution full-frame architecture CCD imaging devices for use in professional color, digital still-imaging applications. These devices are made using 6.8 μm pixels and contain a dual-s
Autor:
Eric J. Meisenzahl, Herbert J. Erhardt, J. R. Fischer, P.P.K. Lee, Robert H. Philbrick, J.M. Andrus, Robert M. Guidash, G. Ting, Antonio S. Ciccarelli
Publikováno v:
Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit.
A 2 /spl mu/m BiCMOS process module has been developed for incorporation into existing charge-coupled device (CCD) image sensor processes. The modular process architecture allows integration of CMOS, NPN bipolar or BiCMOS circuits without affecting t
Front-illuminated full-frame charge-coupled-device image sensor achieves 85% peak quantum efficiency
Autor:
Hung Doan, William Des Jardin, Eric G. Stevens, William V. Davis, Eric J. Meisenzahl, Gloria G. Putnam, Joseph E. Shepherd, Keith Wetzel, Laurel J. Pace, Joseph R. Summa, Antonio S. Ciccarelli
Publikováno v:
SPIE Proceedings.
A high sensitivity front-illuminated charge-coupled device (CCD) technology has been developed by combining thetransparent gate technology introduced by Kodak in 1999 with the microlens technology usually employed on interlineCCDs. In this new archit
Autor:
Hung Doan, Eric G. Stevens, Joseph E. Shepherd, Eric J. Meisenzahl, William Des Jardin, Win-Chyi Chang
Publikováno v:
SPIE Proceedings.
This paper describes the performance of an advanced high- resolution full-frame architecture CCD imaging device for use in scientific, medical and other high-performance monochromatic digital still imaging applications. Of particular interest is the
Autor:
Kwok Y. Wong, Eric G. Stevens, William Des Jardin, Stephen L. Kosman, Eric J. Meisenzahl, Joseph E. Shepherd, Win-Chyi Chang
Publikováno v:
SPIE Proceedings.
This paper describes the performance of an advanced high- resolution full-frame architecture CCD imaging device for use in scientific, medical, and other high performance monochromatic digital still imaging applications. Of particular interest is the
Autor:
J. R. Fischer, Robert H. Philbrick, Eric J. Meisenzahl, Antonio S. Ciccarelli, J.M. Andrus, Herbert J. Erhardt, R. Michael Guidash, Timothy J. Kenney, Paul P. Lee
Publikováno v:
SPIE Proceedings.
A 2 micrometers BiCMOS process module has been developed for incorporation into existing high performance 2-phase CCD processes, to enable integration of digital and analog circuits on- chip with the CCD image sensor. The modular process architecture
Publikováno v:
SPIE Proceedings.
High-resolution solid-state image sensors have become readily available due to continuing advances in VLSI technology. The authors have developed a 1.6 megapixel full-frame CCD image sensor (KAF-1600) with a 3:2 aspect ratio to meet industrial and sc