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Publikováno v:
IEEE Journal of Solid-State Circuits. 54:1789-1799
Large-scale matrix-vector multiplications, which dominate in deep neural networks (DNNs), are limited by data movement in modern VLSI technologies. This paper addresses data movement via an in-memory-computing accelerator that employs charged-domain
Publikováno v:
VLSI Circuits
We present a 65nm CMOS mixed-signal accelerator for first and hidden layers ofbinarized CNNs. Hidden layers support up to 512, 3 ×3 ×512 binary - input filters, and first layers support up to 64, 3×3 ×3 analog-input filters. Weight storage and mu