Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Erdem Kaltalioglu"'
Autor:
Sameer H. Jain, Dimitri Lederer, Arvind Kumar, Sudesh Saroop, Chris Prindle, P. Srinivasan, Wen Liu, Ravi Achanta, Erdem Kaltalioglu, Stephen Moss, Greg Freeman, Paul Colestock
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::805a95f9089595588390109f55e90059
https://hdl.handle.net/2078.1/262709
https://hdl.handle.net/2078.1/262709
Autor:
Sandip De, Rainer Loesing, Rajesh Sathiyanarayanan, Rajan K. Pandey, H.G. Parks, Srini Raghavan, Shahab Siddiqui, Min Dai, Erdem Kaltalioglu
Publikováno v:
Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 35:012202
In this study, the authors investigate the impact of radical oxygen plasma on nitrided and annealed atomic layer deposited (ALD) SiO2 as a thick gate oxide (1.65–3 V) with a high-k/metal gate transistor. Time-dependent-dielectric-breakdown voltage,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d95ca8bc03f771863126f2b7f3e2794b
https://doi.org/10.1116/1.4974250
https://doi.org/10.1116/1.4974250
Autor:
Franz Ungar, T. Goebel, Vidhya Ramachandran, Armin Fischer, Anil K. Chinthakindi, Sun-OO Kim, Douglas D. Coolbaugh, Kyung-Bae Park, Jason Gill, M. Shinosky, Y. Siew, F. Chen, Erdem Kaltalioglu
Publikováno v:
2006 IEEE International Reliability Physics Symposium Proceedings.
Integration of low-cost and high performance passive capacitors into existing Silicon CMOS technologies is essential for analog and radio frequency (RF) IC applications. Recently, BEOL vertical natural capacitors (VNCAP) with stacked via-comb structu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::841b5a74272fc75d429345d495adb787
https://doi.org/10.1109/relphy.2006.251267
https://doi.org/10.1109/relphy.2006.251267
Autor:
Erdem Kaltalioglu, Zhijiong Luo, Victor Ku, Y. H. Lin, A. Ajmera, Seong-Dong Kim, T. Schiml, W. L. Tan, S. Marokkey, P. Wrschka, Dirk Vietzke, M. Weybright, F.F. Jamin, R. Mo, D.-G. Park, An L. Steegen, Wenhe Lin, Padraic Shafer, Terence B. Hook, V. Klee, JiYeon Ku, Rajesh Rengarajan, C. Wann, K. Kim, Jenny Lian, Andy Cowley, Victor Chan, Sunfei Fang, A. Vayshenker, K-C. Lee, Christopher V. Baiocco, I. Yang, L. Kim, Manfred Eller, Randy W. Mann, B. Zhang, C. Coppock, Mark Hoinkis, J. Sudijono, Huilong Zhu, Phung T. Nguyen
Publikováno v:
Scopus-Elsevier
This paper reports a cutting-edge 65nm CMOS technology featuring high performance and low power CMOS devices for both general and low power applications. Utilizing plasma nitrided gate oxide, off-set and slim spacers, advanced co-implants, NiSi and l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d5455847fc85f7a2c23cdb1895e40c02
https://doi.org/10.1109/iedm.2004.1419254
https://doi.org/10.1109/iedm.2004.1419254
Integration of high-performance, low-leakage and mixed signal features into a 100 nm CMOS technology
Autor:
Thomas Schafbauer, S. Sportouch, Baozhen Li, Pak Leung, Y. H. Lin, Yi-Cheng Chen, Yimin Huang, Phung T. Nguyen, Chuan Lin, Shih-Fen Huang, Ming-Tsan Lee, A. Olbrich, Philipp Riess, J. Brighten, G. Knoblinger, Andy Cowley, U. Hodel, A. Grassmann, W. Nissl, Dirk Vietzke, Kun-Chi Lin, Larry Clevenger, Kai Esmark, Robert C. Wong, Hsiang-Jen Huang, C. Wann, M. Commons, Alan J. Leslie, T. Schiml, Martin Wendel, Qiuyi Ye, Erdem Kaltalioglu, Nivo Rovedo, Alvin G. Thomas
Publikováno v:
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).
Low voltage operation in sub-0.25 /spl mu/m requirements mean that the simultaneous integration of all components on a single chip - high performance, low leakage and mixed-signal components - is crucial. In this paper, we present the successful inte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a1f93d57ef161cbbc8cc1ab25585ee1
https://doi.org/10.1109/vlsit.2002.1015388
https://doi.org/10.1109/vlsit.2002.1015388
Autor:
E. Hsiung, Terry A. Spooner, G. Brase, Erdem Kaltalioglu, F. Grellner, Mark Hoinkis, B. von Ehrenwall, D. Warner, Klaus Schruefer, T. Schiml, L. Burrell, Robert C. Wong, C. Wang, Thomas Schafbauer, A. Von Ehrenwall, Tobias Mono, P. Kim, G. Knoblinger, Fernando Guarin, K.C. Chen, Petra Felsner, Alan J. Leslie, Uwe Schroeder, S. Biesemans, E. Demm, Andy Cowley, J. Gill, L.K. Han, S. Kulkarni, P. Leung
Publikováno v:
2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).
We describe an advanced 0.13 /spl mu/m CMOS technology platform optimized for density, performance, low power and analog/mixed signal applications. Up to 8 levels of copper interconnect with the industry's first true low-k dielectric (SiLK, k=2.7) (G
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1a52140b062f05c7d625e27c2facbcf4
https://doi.org/10.1109/vlsit.2001.934969
https://doi.org/10.1109/vlsit.2001.934969
Autor:
C. Wann, N. Rovedo, Yimin Huang, Jia Chen, Yao-Ching Cheng, J. Brighten, Chih-Yung Lin, Shui-Ming Cheng, Ming-Tsan Lee, Thomas Schafbauer, Jen-Kon Chen, A. Grassmann, Alvin G. Thomas, B. von Ehrenwall, N. Chen, Pak Leung, O.S. Park, S. Sportouch, C.H. Liu, Shih-Fen Huang, Manfred Eller, M. Commons, Stewart E. Rauch, Erdem Kaltalioglu, Yu-Shyang Huang, T. Schiml, Wei Jin, L. Clevenger
Publikováno v:
International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).
50 nm CMOS transistors for high performance and low active power applications are presented. Good short-channel effect control is achieved down to 35 nm gate length. These transistors will be incorporated in a leading edge 100 nm technology, with opt
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2d8cf12dc12ca0ab0452598bab6fc228
https://doi.org/10.1109/iedm.2001.979474
https://doi.org/10.1109/iedm.2001.979474