Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Eli Almog"'
Autor:
Yoav Sterman, Eli Almog
Publikováno v:
Computer-Aided Design. 146:103214
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f6653e42056c817c9ad17a7b54db603
https://doi.org/10.1016/j.cad.2022.103214
https://doi.org/10.1016/j.cad.2022.103214
Publikováno v:
IEEE Design & Test of Computers. 21:84-93
Functional verification is widely recognized as the bottleneck of the hardware design cycle. With the ever-growing demand for greater performance and faster time to market, coupled with the exponential growth in hardware size, verification has become
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::affbe072574cd5b7c952e0f8f428f12c
https://doi.org/10.1109/mdt.2004.1277900
https://doi.org/10.1109/mdt.2004.1277900
Autor:
Hadas Shachnai, Eli Almog
Publikováno v:
Performance Evaluation. 46:193-218
Multiprocessors are becoming a common type of modern computers. In this work, we focus on the bus architecture, in which a shared bus is used for communication between processors — and between processors and memories. We consider the following opti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::778e3783dab9499dda142e1218dc9b48
https://doi.org/10.1016/s0166-5316(01)00050-5
https://doi.org/10.1016/s0166-5316(01)00050-5
Publikováno v:
DAC
Verifying new hardware systems is a daunting task. To reduce the amount of effort involved, verification teams attempt to reuse as much verification IP as possible. We introduce a novel approach for test generation that enables the reuse of verificat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e4eaeae7f429d05f7a4973acd599c50
https://doi.org/10.1145/2024724.2024913
https://doi.org/10.1145/2024724.2024913
Autor:
Thomas Laidig, Eli Almog, Wolfgang Staud, Nigel R. Farrar, Linard Karklin, Saeed Sabouri, Jeremy Zelenko, J. Fung Chen, Roger F. Caldwell, Fang Cheng Chang, Clive Wu, Wayne P. Shen
Publikováno v:
SPIE Proceedings.
The lithography world is in transition from I-line to DUV for 0.25 micrometer and below technologies. However, no matter what printing wavelength we are using, reticle inspection is still off-wavelength for the foreseeable future. Due to the extreme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e386ed8d4015199dfe8ea0f05c833ea3
https://doi.org/10.1117/12.332818
https://doi.org/10.1117/12.332818
Autor:
Rebecca M. Gott, G. Dittmann, Christopher A. Krygowski, A. D. Shah, Eli Almog, Thompto Brian W, R. Breil, Dean G. Bair, William J. Lewis
Publikováno v:
IBM Journal of Research and Development. 56:13:1-13:16
This paper highlights key advances in the presilicon verification effort of the IBM zEnterprise® 196 (z196) microprocessor and storage hierarchy. It focuses on the unique set of verification challenges as well as the process innovations that address
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e966aa0befcf6f8b2f54a16d5fcbb237
https://doi.org/10.1147/jrd.2011.2178737
https://doi.org/10.1147/jrd.2011.2178737
Conference
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