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pro vyhledávání: '"Eduard Kulchinsky"'
Publikováno v:
2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS).
In this paper, power supply induced jitter on clock lane is investigated under different Power Delivery Network configurations for a Low Power Double Data Rate system. Novelty of this paper is in the identification of best topology for sharing of pow
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::707c63919ddce1fbe3237cc62eef4271
https://doi.org/10.1109/edaps.2018.8680889
https://doi.org/10.1109/edaps.2018.8680889
