Zobrazeno 1 - 10
of 97
pro vyhledávání: '"E. Seebacher"'
Autor:
D. Boeckle, P. Tabares, X. Zhou, S. Schimanski, M. J. Steinhardt, M. Bittrich, E. Seebacher, M. Ulbrich, A. Wilnit, C. Metz, A. Heidemeier, T. Bley, R. Werner, A. Buck, H. Einsele, M. Kortüm, A. Beilhack, L. Rasche
Publikováno v:
HemaSphere, Vol 6, Pp 1852-1853 (2022)
Externí odkaz:
https://doaj.org/article/48ffc4a6ca234d6c931e3d41abb7f569
Autor:
E.G. Ioannidis, Ewald Wachmann, Friedrich Peter Leisenberger, Verena Vescoli, K. Rohracher, Walter Pflanzl, F. Roger, E. Seebacher
Publikováno v:
Solid-State Electronics. 135:1-7
In this paper, we present a detailed investigation of the impact of different Lightly Doped Drain (LDD) implants and different well doping on the low frequency noise performance of n- and p-MOS devices from a CMOS technology node. We investigate the
Publikováno v:
Solid-State Electronics. 126:158-162
In this paper, we present a detailed investigation of the impact of hydrogen anneal on the low frequency noise spectra of n- and p-MOS devices from an advanced CMOS technology node. We investigate the impact of hydrogen anneal in three different wafe
Publikováno v:
Solid-State Electronics. 103:202-208
This paper proposes a detailed low frequency noise (LFN) parameter extraction method for high-voltage (HV) MOSFETs at low (50 mV) and medium (3 V) drain biases. In Vd = 3 V region, noise coming from the channel is dominant while in linear region ther
Autor:
Nezam Rohbani, Hans Juergen Mattausch, A. Schiffmann, E. Seebacher, Chenyue Ma, H. Miyamoto, Dondee Navarro, Hideyuki Kikuchihara, Alexander Steinmair, T. K. Maiti, M. Miura-Mattausch
Publikováno v:
ESSDERC
A compact aging model for circuit simulation has been developed by considering all possible trapped carriers within MOSFETs. The hot carrier effect and the N(P)BTI effect are modeled by integrating the substrate current as well as the oxide field cha
Autor:
Thomas Gneiting, G. Pasetti, Heidrun Alius, Hao Zou, Ramy Iskander, Alexander Steinmair, Dieu-My Ton, Pierre Tisserand, E. Seebacher, Yasser Moursy
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE) 2016 Conference
Design, Automation & Test in Europe Conference & Exhibition (DATE) 2016 Conference, Mar 2016, Dresde, Germany
DATE
Design, Automation & Test in Europe Conference & Exhibition (DATE) 2016 Conference, Mar 2016, Dresde, Germany
DATE
International audience; In this paper, a proposed methodology to identify the substrate coupling effects in smart power integrated circuits is presented. This methodology is based on a tool called AUTOMICS to extract substrate parasitic network. This
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::26965db693dd179ef3ece8bd1917c9c6
https://hal.science/hal-01293972/document
https://hal.science/hal-01293972/document
Autor:
Marie-Minerve Louerat, Hao Zou, Jean-Paul Chaput, Ramy Iskander, Alexander Steinmair, Heimo Gensinger, E. Seebacher, Yasser Moursy
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers, 2016, pp.2323-2333. ⟨10.1109/TCSI.2016.2618622⟩
IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, 2016, pp.2323-2333. ⟨10.1109/TCSI.2016.2618622⟩
IEEE Transactions on Circuits and Systems I: Regular Papers, 2016, pp.2323-2333. ⟨10.1109/TCSI.2016.2618622⟩
IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, 2016, pp.2323-2333. ⟨10.1109/TCSI.2016.2618622⟩
International audience; Smart Power integrated circuits receive an increasing attraction recently, especially in automotive industry. Sub-strate noise coupling is one of the major causes of failure in this kind of integrated circuits that requires ci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5c579a3297fe99ee2876f03013f121c4
https://hal.science/hal-01397654/file/tcas1.pdf
https://hal.science/hal-01397654/file/tcas1.pdf
Autor:
E. Seebacher, W. Posch
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 25:331-338
A novel characterization methodology for integrated capacitor array mismatch determination is presented. The circuit allows multiplexed biasing of 20 capacitor units and the selection of a specific array on chip. Information about the spatial matchin
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 25:136-144
A characterization setup for high voltage (HV) LD-MOSFET mismatch and variability determination is presented. Devices are aligned in rows and columns for gate and drain bias multiplexing and special HV-switches for voltages up to 50 V are controlled
Autor:
Hajdin Ceric, Roberto Lacerda de Orio, E. Seebacher, Hubert Enichlmair, Stanislav Tyaginov, Tibor Grasser, Jong Mun Park, Ch. Jungemann, Ivan A. Starkov
Publikováno v:
Microelectronics Reliability. 51:1525-1529
We develop an analytical model for hot-carrier degradation based on a rigorous physics-based TCAD model. The model employs an analytical approximation of the carrier acceleration integral (calculated with our TCAD approach) by a fitting formula. The