Zobrazeno 1 - 10
of 25
pro vyhledávání: '"E. Orasson"'
Publikováno v:
2016 11th European Workshop on Microelectronics Education (EWME)
EWME
EWME
We propose a tool set for teaching and e-learning the main principles of design-for-testability technics for digital systems. It is a collection of software tools which simulate a circuit under test, emulate a pool of different strategies, methods an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a9e0b8e9796a8541aac201022174e0b3
Fault Collapsing in Digital Circuits Using Fast Fault Dominance and Equivalence Analysis with SSBDDs
Publikováno v:
VLSI-SoC: Design for Reliability, Security, and Low Power
IFIP Advances in Information and Communication Technology
IFIP Advances in Information and Communication Technology-VLSI-SoC: Design for Reliability, Security, and Low Power
VLSI-SoC: Design for Reliability, Security, and Low Power ISBN: 9783319460963
VLSI-SoC (Selected Papers)
IFIP Advances in Information and Communication Technology
IFIP Advances in Information and Communication Technology-VLSI-SoC: Design for Reliability, Security, and Low Power
VLSI-SoC: Design for Reliability, Security, and Low Power ISBN: 9783319460963
VLSI-SoC (Selected Papers)
The paper presents a new method and an algorithm for structural fault collapsing to reduce the search space for test generation, to speed up fault simulation and to make the fault diagnosis easier in digital circuits. The proposed method is based on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f167905350a794ffd130416e55cef82f
Publikováno v:
Microprocessors and Microsystems. 32:254-262
Classical built-in self-test (BIST) approaches are largely based on pseudorandom testing, and using linear feedback shift registers (LFSR) for test set generation and test response compaction. In this paper, we are concentrating on one possible exten
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7b6d78165ec7f0f6f0c417ded762979d
https://doi.org/10.1016/j.micpro.2008.03.007
https://doi.org/10.1016/j.micpro.2008.03.007
Publikováno v:
DSD
The paper presents a new structural fault collapsing method with linear algorithmic complexity to reduce the search space for test generation and fault diagnosis in digital circuits. The method is based on the two phase topology analysis of the circu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f1cb451c70e821f733f7de09be506a0
https://doi.org/10.1109/dsd.2015.43
https://doi.org/10.1109/dsd.2015.43
Publikováno v:
NORCHIP
A methodology for organization of at-speed functional Built-In Self-Test in processors, based on real functional routines is presented. The proposed self-test includes on-chip test application and response collection by using the functionality of the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ead83df8637c807070bdaedfc8711015
https://doi.org/10.1109/norchp.2012.6403148
https://doi.org/10.1109/norchp.2012.6403148
Autor:
E. Orasson, Helena Kruus, Peeter Ellervee, Paul Annus, M. Brik, K. Meigas, Maksim Gorev, Mart Min, Raimund-Johannes Ubar, Vadim Pesonen, Margus Kruus, S. Devadze
Publikováno v:
2012 13th Biennial Baltic Electronics Conference.
We propose a benchmark suite for systematic evaluation of efficiency of new CAD and test algorithms. The suite consists of a set of high performance signal processors. Differently from all other existing benchmark suites, all the member processors of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::11e280443d2e246ee620deafbb845c08
https://doi.org/10.1109/bec.2012.6376821
https://doi.org/10.1109/bec.2012.6376821
Publikováno v:
SIES
This paper describes an optimization technique for finding test solutions for embedded core-based systems. For embedded systems the traditional external tester based test is often unfeasible and therefore different self-test solutions are sought afte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::659c59df91b2bf43839295828db038a7
https://doi.org/10.1109/sies.2007.4297319
https://doi.org/10.1109/sies.2007.4297319
Publikováno v:
2006 International Biennial Baltic Electronics Conference.
Classical built-in self-test (BIST) architectures are usually relying on linear feedback shift registers (LFSR) for test set generation and test response compaction. This paper is based on extension of the classical BIST, namely hybrid BIST, where ps
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a0cfa8021a7ed221b4f33b45b5bfba7
https://doi.org/10.1109/bec.2006.311097
https://doi.org/10.1109/bec.2006.311097
Publikováno v:
2005 6th International Conference on Information Technology Based Higher Education and Training.
An environment targeted to e-learning is presented for teaching advanced test issues in digital electronics. Digital circuits and systems are getting more and more complex, and in the same time the requirements for the quality of systems are getting
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5b0d42c7d21015b8f797bc00046d480
https://doi.org/10.1109/ithet.2005.1560318
https://doi.org/10.1109/ithet.2005.1560318
Publikováno v:
2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595).
A new teaching concept for teaching testing issues in digital design, which supports the possibility of distance learning as well as a Web-based computer-aided teaching is presented. It offers a set of tools ("interactive modules") to inspect the tea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ba3cbfb20e523c45fed1760f5bc07ba3
https://doi.org/10.1109/miel.2002.1003344
https://doi.org/10.1109/miel.2002.1003344