On the Zero Temperature Coefficient in Cryogenic FD-SOI MOSFETs

Autor: E. Catapano, T. Mota Frutuoso, M. Cassé, G. Ghibaudo

Publikováno v: IEEE Transactions on Electron Devices. 70:845-849

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::c22e0d8232fb9d704272b8c766400a15
https://doi.org/10.1109/ted.2022.3215097

TCAD simulations of FDSOI devices down to deep cryogenic temperature

Autor: E. Catapano, M. Cassé, F. Gaillard, S. de Franceschi, T. Meunier, M. Vinet, G. Ghibaudo

Publikováno v: Solid-State Electronics
Solid-State Electronics, 2022, 194, pp.108319. ⟨10.1016/j.sse.2022.108319⟩

International audience

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f205cc13216cafe47d29eaf69481eb87
https://hal.science/hal-03974981

Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration

Autor: T. Mota Frutuoso, X. Garros, P. Batude, L. Brunet, J. Lacord, B. Sklenard, V. Lapras, C. Fenouillet-Beranger, M. Ribotta, A. Magalhaes-Lucas, J. Kanyandekwe, R. Kies, G. Romano, E. Catapano, M. Casse, J. Lugo-Alvarez, P. Ferrari, F. Gaillard

Publikováno v: IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022)
IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Jun 2022, Honolulu (HI), United States. ⟨10.1109/VLSITechnologyandCir46769.2022.9830504⟩
IEEELink

International audience; We present, for the first time, a new CV based technique to extract the Active Dopant Profile under the spacer in thin film FDSOI devices (CV-AJP). The methodology is successfully applied to FDSOI devices fabricated at 500°C

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9eef2750dbb3aeee813a581581b63000
https://hal.science/hal-04069091

Material and integration challenges for large scale Si quantum computing

Autor: M. Vinet, T. Bedecarrats, B. Cardoso Paz, B. Martinez, E. Chanrion, E. Catapano, L. Contamin, L. Pallegoix, B. Venitucci, V. Mazzocchi, H. Niebojewski, B. Bertrand, N. Rambal, C. Thomas, J. Charbonnier, P.-A. Mortemousque, J.-M. Hartmann, E. Nowak, Y. Thonnart, G. Billiot, M. Casse, M. Urdampilleta, Y.-M. Niquet, F. Perruchot, S. De Franceschi, T. Meunier

Publikováno v: 2021 IEEE International Electron Devices Meeting (IEDM).

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::fc6229c3502f66a5a1fa4071267e31ce
https://doi.org/10.1109/iedm19574.2021.9720708

Characterization and Lambert – W Function based modeling of FDSOI five-gate qubit MOS devices down to cryogenic temperatures

Autor: S. De Franceschi, Mikael Casse, E. Catapano, Maud Vinet, F. Gaillard, A. Apra, Tristan Meunier, Gerard Ghibaudo

Publikováno v: 2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS).

FD-SOI five-gate (5G) qubit MOS devices are electrically characterized in linear regime down to deep cryogenic temperatures. The Lambert-W function is successfully used for the modelling of such 5G MOS devices from subthreshold regime to strong inver

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::420ed3b338d271fa9bc59f99522085a7
https://doi.org/10.1109/eurosoi-ulis53016.2021.9560671