Zobrazeno 1 - 10
of 29
pro vyhledávání: '"E. Bushehri"'
Autor:
R.M. Bertenburg, A. Brennemann, P. Velling, M. Agethen, E. Bushehri, G. Janssen, Dietmar Keiper
Publikováno v:
Conference Proceedings. 14th Indium Phosphide and Related Materials Conference (Cat. No.02CH37307).
Carbon doped InP/(InGa)As Heterostructure Bipolar Transistors (HBT) are of interest for today's (OC-768) and tomorrow's (OC-3072, 100 Gbit Ethernet, UMTS) communication standards. For a reliable fabrication of these complex radio frequency (opto-)ele
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e933e0567ad69301e04f14e9953ced6a
https://doi.org/10.1109/iciprm.2002.1014120
https://doi.org/10.1109/iciprm.2002.1014120
Autor:
V. Staroselsky, T. Schlichter, E. Bushehri, W. Daumann, M. Agethen, Franz-Josef Tegude, V. Bratov, W. Brockerhoff, A. Brennemann, R.M. Bertenburg
Publikováno v:
ICECS
This paper describes the InP-based HFET technology for the implementation of high bitrate logic gates. A novel logic gate configuration is presented based on depletion mode HFETs (DHFET) using a nonlinear negative feedback (NNFB) for optimized high s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1686aff48f631070f807e38a88cccccc
https://doi.org/10.1109/icecs.1998.814016
https://doi.org/10.1109/icecs.1998.814016
Autor:
V. Staroselsky, A. Brennemann, V. Bratov, T. Schlichter, M. Agethen, R.M. Bertenburg, W. Brockhoff, Franz-Josef Tegude, E. Bushehri
This paper presents the performance of an 11-stage ring oscillator for high speed digital circuits using a gate configuration with nonlinear negative feedback (NNFB). An additional transistor is introduced into the switching path of buffered FET logi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ff7b981e7729a6e3df024dd8a9e65ae7
https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&origin=inward&scp=0033723553
https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&origin=inward&scp=0033723553
A T&H circuit with a sampling rate of 6 Gsample/s has been experimentally demonstrated in AlGaAs/GaAs/AlGaAs HEMT technology. The circuit utilises a dual bridge topology suitable for interleaved ADC circuits, doubling the effective sampling rate with
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::92e768981fa3728352a81387c5ba4de4
https://publica.fraunhofer.de/handle/publica/192362
https://publica.fraunhofer.de/handle/publica/192362
Autor:
E. Bushehri, Karl Goser, F. J. Tegude, Werner Prost, U. Auer, R.M. Bertenburg, C. Pacha, G. Janssen, A. Brennemann, W. Brockerhoff
An InP-based HFET technology for monolithically integrated high speed digital circuits is described. A novel logic gate configuration is presented based on depletion mode HFETs using a nonlinear negative feedback for high speed operation. A possible
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6526000db0f4f9373270c8fb2d831812
https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&origin=inward&scp=0032217978
https://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&origin=inward&scp=0032217978
Publikováno v:
IEE Colloquium on Advanced Developments in Microelectronic Engineering.
Over the past few years there has been a steady progress in the development of digital GaAs technologies providing VLSI complexity to the high speed system designers. The improvements in the fabrication process have resulted in the emergence of over
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c489e6ea9a1328eed95dda7b69c29219
https://doi.org/10.1049/ic:19961243
https://doi.org/10.1049/ic:19961243
Publikováno v:
Electronics Letters. 31:1828-1829
Design and evaluation of a novel high speed low power static RAM cell in AlGaAs/GaAs quantum well technology is presented. A current sense amplifier to accompany this cell is also proposed. Simulation results show an access time of 700 ps with standb
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9395f58829bbea509cdb27dda019c48d
https://doi.org/10.1049/el:19951278
https://doi.org/10.1049/el:19951278
Publikováno v:
Electronics Letters. 36:36
A source coupled FET logic gate configuration is proposed for achieving high speed and low power dissipation. A frequency of 2.4 GHz has been achieved, based on measurements on a divide-by-20 frequency divider, dissipating only 12 mW from a single 2
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d28dd3d6a2deb5295f3c875dacd87c54
https://doi.org/10.1049/el:20000016
https://doi.org/10.1049/el:20000016
Autor:
V. Bratov, V. Staroselsky, M. Rieger-Motzer, A. Huelsmann, A. Thiede, B. Raynor, E. Bushehri, T. Schlichter
Publikováno v:
IEE Proceedings - Circuits, Devices and Systems. 144:243
Evaluation of a high-performance logic gate configuration, utilising enhancement mode field effect transistors, is presented in AlGaAs/GaAs/AlGaAs quantum well HEMT technology. The performance of the gate in terms of speed, based on frequency divider
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a1a85e8c25da17156aab4ab2f3be9cab
https://doi.org/10.1049/ip-cds:19971145
https://doi.org/10.1049/ip-cds:19971145
Autor:
M. Rieger-Motzer, J. Hornung, Wolfgang Bronner, B. Raynor, A. Thiede, E. Bushehri, G. Kaufel, Joachim Schneider, U. Nowotny, M. Sedler
Publikováno v:
Electronics Letters. 33:428
The design and performance of a 2 Kbit sine-cosine ROM lookup table in 0.3 /spl mu/m gate length AlGaAs/GaAs/AlGaAs HEMT technology are presented. A maximum clock frequency of 1.3 GHz is achieved resulting in a sub-nanosecond access time. The power c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2abd8840254cae4f0221de7da0fc0606
https://doi.org/10.1049/el:19970278
https://doi.org/10.1049/el:19970278