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pro vyhledávání: '"Dwarakanath, Nagendra Gulur"'
Autor:
Dwarakanath, Nagendra Gulur
Memory system design is increasingly influencing modern multi-core architectures from both performance and power perspectives. Both main memory latency and bandwidth have im-proved at a rate that is slower than the increase in processor core count a
Externí odkaz:
http://etd.iisc.ernet.in/2005/3935
http://etd.iisc.ernet.in/abstracts/4812/G27186-Abs.pdf
http://etd.iisc.ernet.in/abstracts/4812/G27186-Abs.pdf
Autor:
Anantpur, Jayvant, Dwarakanath, Nagendra Gulur, Kalyanakrishnan, Shivaram, Bhatnagar, Shalabh, Govindarajan, R.
The Streaming Multiprocessors (SMs) of a Graphics Processing Unit (GPU) execute instructions from a group of consecutive threads, called warps. At each cycle, an SM schedules a warp from a group of active warps and can context switch among the active
Externí odkaz:
http://arxiv.org/abs/1712.04303