Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Durga Digdarsini"'
Publikováno v:
2019 6th International Conference on Signal Processing and Integrated Networks (SPIN).
This paper gives the design and implementation of Xilinx FPGA based Forward Error Correction (FEC) encoder for DVB S2 system which includes BCH code followed by LDPC code and finally bit mapped to constellation for QPSK modulation. DVB-S2 FEC: ( $\ma
Publikováno v:
2016 IEEE Annual India Conference (INDICON).
This paper presents the design and implementation of an effective Single Event Upset (SEU) mitigation technique for radtolerant Xilinx virtex-4xqr4vsx55FPGA used in Digital Bandwidth Efficient Filter (DBEF) subsystem for a Geostationary mission. The
Publikováno v:
2016 3rd International Conference on Signal Processing and Integrated Networks (SPIN).
This paper describes the design and in-house development of FPGA based Digital Beam Forming Hardware for 16 elements configuration. Key function of the System involves electronic steering of beam in desired direction to provide anti-jamming feature i
Publikováno v:
2014 International Conference on Signal Processing and Integrated Networks (SPIN).
Automatic identification of the digital modulation type of asignal has found applications in many areas, including software defined radio (SDR), surveillance and threat analysis. This paper describes the FPGA based implementation of Automatic Modulat