Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Duan-Juat Ho"'
Publikováno v:
IEEE Transactions on Consumer Electronics. 44:451-458
A video decoder with an efficient block-level-pipeline controller scheme for MPEG-2 MP@ML is presented. The architecture in most of the reported literature for MPEG-2 MP@ML video uses a 64-bit bus and a complex bus arbitration scheme to communicate w
Hardware module for an adaptive modeling unit of multi-symbol multiplication-free arithmetic encoder
Publikováno v:
2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528).
An efficient hardware module for an adaptive modeling unit of a multi-symbol multiplication-free arithmetic coder is presented. By adopting the Fenwick (1994) data structure, our model can access, store, and update the cumulative frequencies with few
Publikováno v:
2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528).
To achieve fast shape decoding in MPEG-4, it is necessary to have a high speed binary shape decoder. A fast architecture is presented here that is able to decode up to 72.4 Mpixels/s, meeting up to MPEG-4 Main Profile @ Level 3 real time requirement.
Publikováno v:
ISCAS
An architecture for MPEG-4 binary shape decoder is presented. Our novel techniques include a look-ahead unit to speed up the probability generation process, the usage of synchronous ROM for reduced power consumption, and the use of simple shift regis
Publikováno v:
2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design & Implementation (Cat. No.00TH8528); 2000, p285-294, 10p
Publikováno v:
2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design & Implementation (Cat. No.00TH8528); 2000, p110-119, 10p
Publikováno v:
Proceedings of the 2000 IEEE International Symposium on Circuits & Systems. Emerging Technologies for the 21st Century (IEEE Cat No.00CH36353); 2000, p457-457, 1p
Conference
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Conference
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