Zobrazeno 1 - 10
of 61
pro vyhledávání: '"Dsp architecture"'
Publikováno v:
IEEE Transactions on Biomedical Circuits and Systems. 15:29-42
This paper presents a digital signal processing (DSP) architecture for real-time and distortion-free recovery of electrically-evoked compound action potentials (ECAPs) from stimulus artifacts and periodic noises in bidirectional neural response telem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::07846676b11b8c557a177b9c13df6c8e
https://doi.org/10.1109/tbcas.2020.3043266
https://doi.org/10.1109/tbcas.2020.3043266
Autor:
Yao Lu, Lingli Wang, Simin Liu, Seyedramin Rasoulinezhad, Hao Zhou, Yuan Dai, Philip H. W. Leong
Publikováno v:
2021 International Conference on Field-Programmable Technology (ICFPT).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da3f87e85c1960f181f279b1d09e4adc
https://doi.org/10.1109/icfpt52863.2021.9609927
https://doi.org/10.1109/icfpt52863.2021.9609927
Autor:
Broich, René
Current radar signal processor architectures lack either performance or flexibility in terms of ease of modification and large design time overheads. Combinations of processors and FPGAs are typically hard-wired together into a precisely timed and pi
Externí odkaz:
http://hdl.handle.net/2263/40821
Autor:
Kuan-Chieh Chao, Terng-Yin Hsu
Publikováno v:
ISOCC
Internet of Things (IoT) operators face challenges in the diverse communication standards and the large number of connected devices when deploying IoT systems. In view of this, we propose a scalable multi-DSP IoT access point (AP). We use DSP and sof
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc0170ea3c27046fea14f2be9c1422d2
https://doi.org/10.1109/isocc47750.2019.9027633
https://doi.org/10.1109/isocc47750.2019.9027633
Autor:
Ashish Bagwari, Isha Katna
Publikováno v:
2019 11th International Conference on Computational Intelligence and Communication Networks (CICN).
Full adder circuit has a vital role in applications such as microprocessors, microcontrollers and DSP architecture. The aim of this work to design low power Ripple carry adder using hybrid 1-bit full adder with small consumption of power and high per
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::adffb4d28330e58723157089f1499cde
https://doi.org/10.1109/cicn.2019.8902351
https://doi.org/10.1109/cicn.2019.8902351
Publikováno v:
International Journal of Future Generation Communication and Networking. 9:327-338
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87c7110e0b54ed2201f3af48b12cb3df
https://doi.org/10.14257/ijfgcn.2016.9.10.28
https://doi.org/10.14257/ijfgcn.2016.9.10.28
Conference
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Publikováno v:
Proceedings of the International Conference on Communication and Electronic Information Engineering (CEIE 2016).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ddd50163df87eb24551db7b8119e2bc8
https://doi.org/10.2991/ceie-16.2017.29
https://doi.org/10.2991/ceie-16.2017.29
Akademický článek
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Autor:
Shavan K. Asker
Publikováno v:
AL-Rafdain Engineering Journal (AREJ). 16:48-58
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5b088056474ac6b9a5467209415a74d8
https://doi.org/10.33899/rengj.2008.44002
https://doi.org/10.33899/rengj.2008.44002