Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Douglas B. Hershberger"'
A cost-competitive high performance Junction-FET (JFET) in CMOS process for RF & analog applications
Autor:
J. Rascoe, Douglas B. Hershberger, Xiaowei Tian, David L. Harame, Richard A. Phelps, S. Sweeney, Yun Shi, James S. Dunn, Robert M. Rassel, Panglijen Candra, BethAnn Rainey
Publikováno v:
2010 IEEE Radio Frequency Integrated Circuits Symposium.
in this paper, we present a cost-effective JFET integrated in 0.18µm RFCMOS process. The design is highly compatible with standard CMOS process, therefore can be easily scaled and implemented in advanced technology nodes. The design impact on R on a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1e99aa3effa3bd43b9e96f8c54fc5f47
https://doi.org/10.1109/rfic.2010.5477348
https://doi.org/10.1109/rfic.2010.5477348
Autor:
Peter B. Gray, P. Chapman, M. Gordon, R. Previty-Kelly, Douglas B. Hershberger, Robert M. Rassel, Alan F. Norris, Alvin J. Joseph, S.L. Von Bruns, Mattias E. Dahlstrom, Michael J. Zierak, Michael L. Gautsch, J. Dunn, Panglijen Candra, Natalie B. Feilchenfeld, J. Lukaitis, Renata Camillo-Castillo, S. St Onge, Benjamin T. Voegeli, K. Watson, Nicholas Theodore Schmidt, Z.X. He
Publikováno v:
2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.
For the first time, we report a 0.24 mum SiGe BiCMOS technology that offers full suite of active device including three distinct NPNs, a vertical PNP, CMOS supporting three different operating-voltages, and wide range of passive devices. In particula
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::680dcea7dc29df2e8835d3376d5fc255
https://doi.org/10.1109/bipol.2008.4662721
https://doi.org/10.1109/bipol.2008.4662721
Autor:
J. Dunn, Qizhi Liu, Ramana M. Malladi, Peter B. Gray, Ping-Chuan Wang, Kenneth J. Stein, Douglas B. Hershberger, R. Previti-Kelly, Panglijen Candra, Ephrem G. Gebreselasie, Benjamin T. Voegeli, K. Watson, Wade J. Hodge, Peter J. Lindgren, Zhong-Xiang He, Alvin J. Joseph
Publikováno v:
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.
In this paper we introduce, a state-of-the-art SiGe BiCMOS power amplifier technology that features two NPNs with 40 GHz / 6.0 V & 27 GHz / 8.5 V (fT - BVceo) respectively, a novel low inductance metal ground through-silicon-via (TSV), integrated on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::69f768941b9f07f9c4bc96f3507b0e97
https://doi.org/10.1109/bipol.2007.4351868
https://doi.org/10.1109/bipol.2007.4351868
Autor:
J. Rascoe, Ebenezer E. Eshun, Benjamin T. Voegeli, S. St Onge, Douglas D. Coolbaugh, P. Demag, Peter J. Geiss, Michael J. Zierak, Natalie B. Feilchenfeld, A. Norris, Bradley A. Orner, David C. Sheridan, J. Dunn, T. Larsen, J. Trappasso, J. He, J. Greco, R. Hussain, V. Patel, Michael L. Gautsch, V. Ramachandrian, Peter B. Gray, Wade J. Hodge, Douglas B. Hershberger, Ryan Wayne Wuthrich, Robert M. Rassel, Louis D. Lanzerotti, D. Jordan, Steven H. Voldman
Publikováno v:
Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting.
High frequency performance at low current density and low wafer cost is essential for low power wireless BiCMOS technologies. We have developed a low-complexity, ASIC-compatible, 0.18 /spl mu/m SiGe BiCMOS technology for wireless applications that of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f876a1838dd55bdb0081b70fd81a5fef
https://doi.org/10.1109/bipol.2002.1042917
https://doi.org/10.1109/bipol.2002.1042917
Autor:
Gregory G. Freeman, Bradley A. Orner, S. Subbanna, Basanth Jagannathan, Robert A. Groves, Douglas D. Coolbaugh, Peter J. Geiss, J. Malinowski, S. St Onge, J. Jeng, M. Gordon, K. Stein, D. L. Harame, Douglas B. Hershberger, David C. Ahlgren, S. Kilpatrick, J. Dunn, Peter B. Gray, L. Lanzerotti, R. Johnson, Kathryn T. Schonenberg, Michael J. Zierak, Natalie B. Feilchenfeld, Alvin J. Joseph
Publikováno v:
Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024).
A new base-after-gate integration scheme has been developed to integrate a 47 GHz f/sub t/, 65 GHz F/sub max/SiGe HBT process with a 0.24 /spl mu/m CMOS technology having 0.18 /spl mu/m L/sub eff/ and 5 nm gate oxide. We discuss the benefits and chal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8abbecd624f03e242f5f04f857d6217b
https://doi.org/10.1109/bipol.1999.803539
https://doi.org/10.1109/bipol.1999.803539