Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Dong Sun Sheen"'
Autor:
Seung Soo Kim, Soo Kyeom Yong, Whayoung Kim, Sukin Kang, Hyeon Woo Park, Kyung Jean Yoon, Dong Sun Sheen, Seho Lee, Cheol Seong Hwang
Publikováno v:
Advanced materials (Deerfield Beach, Fla.).
Vertically integrated NAND (V-NAND) flash memory is the main data storage in modern handheld electronic devices, widening its share even in the data centers where installation and operation costs are critical. While the conventional scaling rule has
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::35df1c7bbf24539cac671bc016b5625c
https://pubmed.ncbi.nlm.nih.gov/35305277
https://pubmed.ncbi.nlm.nih.gov/35305277
Autor:
Minchul Sung, Kwangmyoung Rho, Jayong Kim, Junho Cheon, Kiyoung Choi, Dohee Kim, Hoseok Em, Gyeongcheol Park, Jungwook Woo, Yeongyu Lee, Jaehyeon Ko, Moonhoi Kim, Gwangyeob Lee, Seung Wook Ryu, Dong Sun Sheen, Yangsung Joo, Seiyon Kim, Chang Hyun Cho, Myung-Hee Na, Jinkook Kim
Publikováno v:
2021 IEEE International Electron Devices Meeting (IEDM).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b368d1e138f827222b6bcacae8569598
https://doi.org/10.1109/iedm19574.2021.9720545
https://doi.org/10.1109/iedm19574.2021.9720545
Autor:
Sung-Joo Hong, Sanghyon Kwak, Sungwook Park, Hyun-Seung Yoo, Seiichi Aritome, Jong-Moo Choi, Sung-Chul Shin, Byeongil Han, Keun Woo Lee, Dong-Sun Sheen, Keon-Soo Shim, Sanghyuk Nam, Gyu-Seog Cho, Young Soo Ahn, Iksoo Choi, Eun-Seok Choi, Jinwoong Kim, Sung-Kye Park, Han Soo Joo, Seokkiu Lee, Sung Jae Chung, Yoohyun Noh, Takamaro Kikkawa, Seung-Ho Pyi
Publikováno v:
IEEE Transactions on Electron Devices. 60:1327-1333
Advanced dual control gate with surrounding floating gate (DC-SF) cell process and operation schemes are successfully developed for 3-D nand flash memories. To improve performance and reliability of DC-SF cell, new metal control gate last (MCGL) proc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f06b4cf78a85a0dd53490f76f96026e0
https://doi.org/10.1109/ted.2013.2247606
https://doi.org/10.1109/ted.2013.2247606
Autor:
Hyun-Chul Sohn, Jae Hong Kim, Yong Sun Sohn, Chai O. Chung, Dong-Sun Sheen, Jinwoong Kim, Sungwook Park
Publikováno v:
Journal of Applied Physics. 96:1435-1442
The effect of fluorine incorporation on properties of silicon dioxide thin films has been studied as a function of NF3∕O2 gas flow ratio. Fluorine was incorporated into silicon dioxide films during high density plasma chemical vapor deposition with
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::763d176cc9a26135b80d4a4c58635843
https://doi.org/10.1063/1.1767979
https://doi.org/10.1063/1.1767979
Autor:
Wan Sup Shin, Sung Soon Kim, Seung Jin Yeom, Takeshi Ueda, Byung-Seok Lee, Min Sung Ko, Dong Sun Sheen, Sung Ki Park, Toshikazu Ishigaki, Woo Sik Yoo, Noh Yeal Kwak, Kitaek Kang
Publikováno v:
2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS).
Raman spectroscopy was used for characterizing poly-Si after thermal annealing of chemical vapor deposited (CVD) thin a-Si films in the vertical channel region of 3D V-NAND device wafers using various annealing conditions and techniques. Raman spectr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::14488fed0a7a2eac84488706bb950221
https://doi.org/10.1109/nvmts.2014.7060843
https://doi.org/10.1109/nvmts.2014.7060843
Autor:
Sung-Chul Shin, Byeongil Han, Sung-Kye Park, Jong-Moo Choi, Keun Woo Lee, Seokkiu Lee, Sung-Joo Hong, Iksoo Choi, Sungwook Park, Seung-Ho Pyi, Keon-Soo Shim, Sung Jae Chung, Dong-Sun Sheen, Seiichi Aritome, Gyu-Seog Cho, Sanghyuk Nam, Sanghyon Kwak, Hyun-Seung Yoo, Yoohyun Noh, Young Soo Ahn, Jinwoong Kim
Publikováno v:
2012 Symposium on VLSI Technology (VLSIT).
A new Metal Control Gate Last process (MCGL process) has been successfully developed for the DC-SF (Dual Control gate with Surrounding Floating gate cell)[1] three-dimensional (3D) NAND flash memory. The MCGL process can realize a low resistive tungs
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23708558b3bd180f7b3641ffc4a9a674
https://doi.org/10.1109/vlsit.2012.6242440
https://doi.org/10.1109/vlsit.2012.6242440
Autor:
Sung-Jin Whang, Byoungho Lee, Joo-Hee Han, Young Jin Lee, Jin-Hae Choi, Jinwoong Kim, MinSoo Kim, Seung-Ho Pyi, Dong-Sun Sheen
Publikováno v:
2011 IEEE International Interconnect Technology Conference.
This paper presents an optimized Co silicide process to realize low resistance multilayered word lines in 3D NAND Flash device. With CVD Co method, it is obtained that the step coverage is about 97% at the aspect ratio of 15∶1 trench. Co silicide i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::952a7d2626f238e3182079f2d4b5b18c
https://doi.org/10.1109/iitc.2011.5940281
https://doi.org/10.1109/iitc.2011.5940281
Autor:
Byung Seok Lee, Noh Yeal Kwak, Takeshi Ueda, Wan Sup Shin, Kitaek Kang, Min Sung Ko, Dong Sun Sheen, Sung Soon Kim, Toshikazu Ishigaki, Woo Sik Yoo
Publikováno v:
ECS Meeting Abstracts. :1459-1459
Three dimensional (3D) vertical NAND (V-NAND) flash technology has been actively investigated. [1] 3D NAND architectures offer one of the best combinations of device performance, memory density, power consumption and manufacturing cost. All major mem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8b62abd2dbe9ff17af656366e7bf27e8
https://doi.org/10.1149/ma2014-01/39/1459
https://doi.org/10.1149/ma2014-01/39/1459