Zobrazeno 1 - 10
of 20
pro vyhledávání: '"Dong Ok Kwak"'
Autor:
Jong Pa Hong, Su Chang Lee, Soohyun Nam, Sun woo Han, Park Yu-Kyung, Jongho Lee, Sang kun O, Dong Ok Kwak
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
2.5D IC packages are typically produced through Chip on Wafer (CoW) or Chip on Substrate (CoS) processes. Among these, 2.5D processing involves bonding the interposer chip and ASIC chip perpendicularly in sequence to the substrate for 2.5D package pr
Publikováno v:
Korean Journal of Applied Entomology. :203-212
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 6:1667-1676
In this paper, the warpage simulation of a high-density multilayer printed circuit board (PCB) for solid-state disk drive (SSD) and microelectronic package was performed using the anisotropic viscoelastic shell modeling technique. The thermomechanica
Publikováno v:
Journal of Sericultural and Entomological Science. 53:82-86
Publikováno v:
International Symposium on Microelectronics. 2015:000147-000150
FBGA is widely adopted as AP and memory package for mobile devices such as a smart phone and a smart watch. FBGA is attached to PCB assembly during SMT process. Double side SMT is preferred to increase the battery area for slim design and long life o
Publikováno v:
IEEE Transactions on Electronics Packaging Manufacturing. 26:46-53
The joint structure of a transducer horn-holder assembly for a wire bonder was examined through finite element contact analysis. Three-dimensional modeling and analysis was carried out to survey the internal physics of this structure and to verify th
Publikováno v:
Transactions of the Korean Society of Mechanical Engineers A. 26:2008-2017
Joint structure of a transducer horn-holder assembly fur a wire bonder was examined through FEM contact analysis. A three dimensional modeling and analysis was carried out to survey the internal physics of this structure and to prove the accuracy of
Publikováno v:
Journal of Micromechanics and Microengineering. 26:045006
Warpage of multi-layered printed circuit boards (PCB) during the reflow process is a serious problem which affects the reliability of solder ball connections between the PCB and the mounted semi-conductor packages in electronic devices. It is essenti
Autor:
Kuyoung Kim, Jeong-Yeol Kim, Joon-young Oh, Dong-Kil Shin, Hyung-Gil Baek, Young-Hee Song, Dong-Ok Kwak
Publikováno v:
2007 International Conference on Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems. EuroSime 2007.
To achieve design for reliability (DFR), a reliability verification system (RVS) was developed. Package level and board level reliabilities were predicted by the developed system automatically and the design for six sigma (DFSS) was achieved. Process
Publikováno v:
Journal of Micromechanics and Microengineering. 25:105016
In this study, the warpage simulation of a multi-layer printed circuit board (PCB) was performed as a function of various copper (Cu) patterns/photoimageable solder resist (PSR) composite patterns and their anisotropic viscoelastic properties. The th