Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Donato O. Forlenza"'
Autor:
Mary P. Kusko, Edward Michael Seymour, B. Walsh, Orazio P. Forlenza, Donato O. Forlenza, Timothy D. Taylor, James M. Crafts, Dennis R. Conti, William V. Huott, David C. Bogdan
Publikováno v:
ITC
The IBM Power 7™ 4 GHz, eight core microprocessor introduced several new challenges for the Power 7 test team: new pervasive test architecture, 8 asynchronous processor cores, DRAM integrated on the same die as processor and enhanced thermal test r
Autor:
John Sylvestri, Orazio P. Forlenza, Donato O. Forlenza, Peilin Song, Franco Stellari, Darrell L. Miles
Publikováno v:
ITC
In this paper, a new emission-based method for measuring the amplitude of on-chip power supply noise is presented. This technique uses Time Resolved Emission (TRE) waveforms of Light Emission from Off-State Leakage Current (LEOSLC) from CMOS gates, w
Autor:
Phillip J. Nigh, David P. Vallett, Donato O. Forlenza, J. Wright, W. Chong, A. Patel, Franco Motika, R. Kurtulik
Publikováno v:
ITC
SEMATECH has sponsored a "test method evaluation" study to understand the trade-offs among the most common test methodologies used in the industry. This paper presents the results of the failure analysis portion of that project. The testing, reliabil
Autor:
Donato O. Forlenza, T. Koprowski, P. Ryan, Jeffrey G. Gartner, S. Robertson, T. Lizambri, R. Olsen, O. Forlenza, A. Walter, B. Driscoll
Publikováno v:
ITC
The authors present an overview of a comprehensive software system that serves as an automatic bridge between computer-aided-design- (CAD-) generated weighted random patterns (WRPs-) and a per-pin tester that incorporates dedicated hardware to suppor
Publikováno v:
ITC
A current disadvantage of IDDq testing is lack of software-based diagnostic tools that enable IC vendors to create a large database of defects uniquely detected with this test method. We present a methodology for performing defect localization based
Autor:
C. Hirko, R. Yaari, Ulrich Baur, D. W. Wittig, J. A. Kyle, Orazio P. Forlenza, Donato O. Forlenza, Mary P. Kusko, Bryan J. Robbins, Gerard M. Salem, Franco Motika, S. Michnowski, T.G. Foote, Ronald J. Frishmuth
Publikováno v:
IBM Journal of Research and Development. 53:5:1-5:11
For the first time in the history of the IBM System z™ family of mainframes, System z10™ processor chips are tested by both structural and functional means. This complementary strategy starts at wafer test and is consistent through system test. I
Conference
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.