Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Domenico Barretta"'
Autor:
Shubham Rana, Mariano Crimaldi, Domenico Barretta, Petronia Carillo, Valerio Cirillo, Albino Maggio, Fabrizio Sarghini, Salvatore Gerbino
Publikováno v:
Data in Brief, Vol 54, Iss , Pp 110506- (2024)
This research introduces an extensive dataset of unprocessed aerial RGB images and orthomosaics of Brassica oleracea crops, captured via a DJI Phantom 4. The dataset, publicly accessible, comprises 244 raw RGB images, acquired over six distinct dates
Externí odkaz:
https://doaj.org/article/16d9674b262d42bb995ae7c560d1d147
Autor:
Shubham Rana, Salvatore Gerbino, Domenico Barretta, Petronia Carillo, Mariano Crimaldi, Valerio Cirillo, Albino Maggio, Fabrizio Sarghini
Publikováno v:
Data in Brief, Vol 54, Iss , Pp 110430- (2024)
The rationale for this data article is to provide resources which could facilitate the studies focussed over weed detection and segmentation in precision farming using computer vision. We have curated Multispectral (MS) images over crop fields of Tri
Externí odkaz:
https://doaj.org/article/bae84fa1bd90409780001ed5839ee83d
Autor:
Gianluca Palermo, Luca Breveglieri, Matteo Monchiero, Paolo Maistri, Luca Negri, Cristina Silvano, Mariagiovanna Sami, A. Pagni, Roberto Zafalon, Domenico Barretta, Oreste Villa
Publikováno v:
Mobile Information Systems ISBN: 9783540310068
The starting point for the activities in MAIS concerning hardware architectures might be summarized as follows: extract the most relevant and characteristic requirements on and challenges to the hardware architecture presented by the MAIS application
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::376fed7f759a71dd129f25b29eb5ac06
https://doi.org/10.1007/3-540-31008-8_7
https://doi.org/10.1007/3-540-31008-8_7
Publikováno v:
DATE
Instruction Level Parallelism (ILP) extraction for multi-cluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and thread level parallelism jointly, thus allowing an easier parallelism
Publikováno v:
ICCD
We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances ma