Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Do-Sun Lee"'
Publikováno v:
Korea CPTED Association. 12:57-88
Publikováno v:
Korea CPTED Association. 12:89-123
Autor:
Do-Sun Lee
Publikováno v:
The History Education Review. 30:395-420
Autor:
Do Sun Lee, Junny Park
Publikováno v:
Korea CPTED Association. 9:35-63
Autor:
Do Sun Lee
Publikováno v:
The Correction Welfare Society of Korea. 56:81-99
Publikováno v:
ECS Transactions. 64:11-18
The effects of various parameters in copper electroplating electrolyte on the filling characteristics of through silicon via(TSVs). Among the various parameters, the concentration of dissolved oxygen was found to be susceptible to bottom-up filling r
Autor:
Do Sun Lee
Publikováno v:
The Police Science Journal. 6:145-169
Autor:
Yeong-lyeol Park, Ki-Young Yun, Jiwoong Sue, Kwang-jin Moon, Chilhee Chung, So-Young Lee, Jin-ho An, Gil-heyun Choi, Byung-lyul Park, Ho-Jun Lee, Ho-Kyu Kang, Do-Sun Lee
Publikováno v:
2012 IEEE International Interconnect Technology Conference.
Stresses induced by the large volume of Cu in Through Silicon Vias (TSV) can result in global/local Cu extrusion which may affect reliability in 3D chip stacking technologies beyond the 28 nm node for high performance mobile devices. In this work, TS
Autor:
Do-Sun Lee, Woon-kyung Lee, Kim Sunggil, Seong-Ook Jung, Joo-Sun Choi, Kyungho Ryu, Heechai Kang
Publikováno v:
CICC
An all-digital multiphase DLL is presented that is robust to delay mismatch due to process variation. Each of four 90° phase shift blocks accurately align each phase to 90° delay using its own ring oscillator and locking delay code. Harmonic lockin
Autor:
Moon Gi Kang, Jin Bum Kim, Yun-Seung Shin, Sangjoo Lee, Woo-Seop Kim, Do-Sun Lee, Yong-Hoon Son, U. I. Chung, Sung-Wook Kang, June Moon, Hyung-Gon Kim, K. H. Lee, P.K. Kang, Eun-Cheol Lee, In-Sun Jung, J.W. Lee, Young-Rok Kim
Publikováno v:
2006 International SiGe Technology and Device Meeting.
The SiGe SD structure in peripheral PMOS area of DRAM was successfully integrated without any degradation of peripheral NMOS properties, which is the first approach to DRAM. The PMOS performance enhancement was found to be more than 40%. The authors