Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Dimitris P. Ioannou"'
Autor:
Jafetra Rambeloson, Dimitris E. Ioannou, Parameswari Raju, Xiao Wang, Abhishek Motayed, Hyeong Jin Yun, Qiliang Li
Publikováno v:
Chemosensors, Vol 10, Iss 10, p 405 (2022)
Photoactivated gallium nitride (GaN) nanowire-based gas sensors, functionalized with either bare In2O3 or In2O3 coated with a nanolayer of evaporated Au (Au/In2O3), were designed and fabricated for high-sensitivity sensing of NO2 and low-power operat
Externí odkaz:
https://doaj.org/article/5dd3c0f90d9e425c8d1568718d885cd0
Autor:
Domna Iordanidou, Michael G. Kallitsakis, Marina A. Tzani, Dimitris I. Ioannou, Tryfon Zarganes-Tzitzikas, Constantinos G. Neochoritis, Alexander Dömling, Michael A. Terzidis, Ioannis N. Lykakis
Publikováno v:
Molecules, Vol 27, Iss 14, p 4395 (2022)
The synthesis of 3,4-dihydroquinoxalin-2-ones via the selective reduction of aromatic, multifunctional nitro precursors catalyzed by supported gold nanoparticles is reported. The reaction proceeds through the in situ formation of the corresponding am
Externí odkaz:
https://doaj.org/article/28e2485e8796495bad185d4eb026eb08
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 3, Iss 6, Pp 468-471 (2015)
With the help of numerical simulations, we revisit the operation of dynamic thin-capacitively-coupled-thyristor RAM (TRAM) and field effect diode-RAM cells and clarify the memory mechanism. The resulting carrier profiles demonstrate that the recently
Externí odkaz:
https://doaj.org/article/86c15d242d344a68aad519e1e653b1b5
Publikováno v:
2022 IEEE International Reliability Physics Symposium (IRPS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b9e36df29b1f8d966a9661565e89d2d
https://doi.org/10.1109/irps48227.2022.9764573
https://doi.org/10.1109/irps48227.2022.9764573
Autor:
Dimitris P. Ioannou, Uppili S. Raghunathan, Dave Brochu, Adam Divergilio, Vibhor Jain, John J. Pekarik
Publikováno v:
2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0e1505a14d5128361d7dbc6d238ade82
https://doi.org/10.1109/bcicts50416.2021.9682453
https://doi.org/10.1109/bcicts50416.2021.9682453
Autor:
Dimitris P. Ioannou
Publikováno v:
Microelectronics Reliability. 54:1489-1499
We present a brief overview of Positive Bias Temperature Instability (PBTI) commonly observed in n-channel MOSFETs with SiO2/HfO2/TiN dual-layer gate stacks when stressed with positive gate voltage at elevated temperatures. We review the origin and p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0b6cdfbf8196f470808a6e8a0c88925
https://doi.org/10.1016/j.microrel.2014.03.018
https://doi.org/10.1016/j.microrel.2014.03.018
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 9:128-134
The positive bias temperature instability (PBTI) and the stress-induced leakage current (SILC) effects are thoroughly examined in nFETs with SiO2/HfO2/TiN dual-layer gate stacks under a wide range of bias and temperature stress conditions. Experiment
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec649b5b9f75fb61665f697be2f3ca9f
https://doi.org/10.1109/tdmr.2009.2020432
https://doi.org/10.1109/tdmr.2009.2020432
Autor:
X. Chen, Derek H. Leu, D. Lea, T. Kirihata, Faraz Khan, J. B. Johnson, Dan Moy, Sami Rosenblatt, Norman Robson, Subramanian S. Iyer, Dimitris P. Ioannou, G. LaRosa, C. Kothandaraman
Publikováno v:
IRPS
We explore the use of oxygen vacancies for nonvolatile data storage by trapping electrons in the high-k, gate dielectric layer of NFETs. Programming is performed via channel carrier injection and is erased by tunneling. 64Kb arrays were constructed a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::72bbefa7cd94621b4282e9a2037e2073
https://doi.org/10.1109/irps.2015.7112816
https://doi.org/10.1109/irps.2015.7112816
Autor:
William F. Landers, C. Kothandaraman, Christopher N. Collins, Steven W. Mittl, G. La Rosa, Mukta G. Farooq, F. Chen, Prakash Periasamy, Subramanian S. Iyer, Dimitris P. Ioannou, Jinping Liu, Daniel Berger, John M. Safran, Jennifer A. Oakley, Ghosh Somnath, Carole D. Graas, Troy L. Graves-Abe
Publikováno v:
IRPS
We integrated a copper TSV (Through Silicon Via) cell in a qualified 32SOI CMOS logic technology with high-K/metal gate and DT (Deep Trench) capacitors. Extensive wafer level characterization and reliability stressing were performed to evaluate the i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a81b53f4f79b8a62370ad073642f86c
https://doi.org/10.1109/irps.2015.7112732
https://doi.org/10.1109/irps.2015.7112732
Publikováno v:
Solid-State Electronics. 48:1947-1951
SOI technologies have long been used for SEU-hardened SRAMs and other radiation-hard circuits. However, to maintain their advantages in the submicron regime, it is essential that the strength of the floating body effects (FBE) and the role of the par
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::40d3641aafb2cfefd2331b3e10475f03
https://doi.org/10.1016/j.sse.2004.05.040
https://doi.org/10.1016/j.sse.2004.05.040