Zobrazeno 1 - 10
of 30
pro vyhledávání: '"Dijun Liu"'
Autor:
Xiao Liu, Erya Deng, Lichuan Luo, Linjun Jiang, Youguang Zhang, Dijun Liu, Biao Pan, Wang Kang
Publikováno v:
Applied Sciences, Vol 13, Iss 20, p 11316 (2023)
Flip-flop (FF) serves as a fundamental unit in various sequential logic circuits and complex digital electronic systems for generating, transforming, and temporarily storing digital signals. Nonvolatility plays a crucial role in FFs by ensuring insta
Externí odkaz:
https://doaj.org/article/61fef27377f04450a0dd1c2cdd6c510f
Publikováno v:
IEEE Access, Vol 7, Pp 147721-147731 (2019)
Simultaneous Localization and Mapping (SLAM) combining visual and inertial measurements has achieved significant attention in the community of Robotics and Computer Vision. However, it is still a challenge to balance real-time requirements and accura
Externí odkaz:
https://doaj.org/article/31fe5e30cdb6479db7a356b24d46a837
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 13:7-20
Publikováno v:
IEEE Transactions on Electron Devices. 69:3455-3461
Publikováno v:
CCF Transactions on High Performance Computing.
Publikováno v:
ICC 2022 - IEEE International Conference on Communications.
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 68:617-621
This brief introduces a 3-bit magnetic analog-to-digital converter (MADC) employing the NAND-SPIN based multi-bit device which has the same structure as the NAND-SPIN memory cell. By adjusting the physical shape of the heavy metal (HM) line, the all-
Autor:
Youguang Zhang, Ying Wang, Chao Wang, Deming Zhang, Bi Wu, Dijun Liu, Zhaohao Wang, Xiaobo Sharon Hu
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:4660-4669
Continued scaling of Complementary Metal Oxide Semiconductor (CMOS) integrated circuit technology is slowing down due to physical limitations, while the static power of CMOS based memory is increasing as the transistors shrink. As an alternative memo
Autor:
Dijun Liu, Weisheng Zhao, Bi Wu, Ying Wang, Jianlei Yang, Pengcheng Dai, Yuanqing Cheng, Zhaohao Wang
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39:803-815
As the speed gap of the modern processor and the off-chip main memory enlarges, on-chip cache capacity increases to sustain the performance scaling. As a result, the cache power occupies a large portion of the total power budget. Spin transfer torque
Autor:
Ying Wang, Pengcheng Dai, Weisheng Zhao, Youguang Zhang, Chao Wang, Jianlei Yang, Yuanqing Cheng, Bi Wu, Dijun Liu, Zhaohao Wang, Xiaobo Sharon Hu
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:108-120
High capacity last-level caches (LLCs) are being used to help alleviate the growing speed gap between the processor and main memory. However, traditional CMOS based memory technologies (SRAM, DRAM, et al.) for such LLCs consume high static power. Non