Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Die shrink"'
Publikováno v:
Microsystems and Nanosystems ISBN: 9783030617080
A MEMS design and the process flow that creates it are inseparable. In this chapter, we describe some MEMS process integration strategies, and what decisions can be made along the way in order to enable a new process flow and mask set to have a high
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a4fb29c0c6ef04c1579866879ee86c4b
https://doi.org/10.1007/978-3-030-61709-7_11
https://doi.org/10.1007/978-3-030-61709-7_11
Publikováno v:
Procedia Manufacturing. 15:504-510
An elastic-plastic FE simulation model is proposed to predict the evolution of gear-tooth deviation in cold forging of a spur bevel gear, and the reliability of this FE model is verified by experiment. Then, the influences of the interference value o
Publikováno v:
2018 International Wafer Level Packaging Conference (IWLPC).
Die sizes continue to shrink and packaging technologies continue to evolve, but the common thread for all of them is the need for increased precision and tighter process control limits to achieve final package yield. Nearly all packaging technologies
Publikováno v:
IEEE Transactions on Electron Devices. 62:1524-1529
A novel 600 V high-voltage IC (HVIC) featuring a high noise tolerance is proposed. The purpose of the proposed HVIC is to achieve the high noise tolerance without an increase of the fabrication cost. The basic device concept is to arrange a P− sepa
Publikováno v:
2017 IEEE 67th Electronic Components and Technology Conference (ECTC).
Fine pitch copper (Cu) pillar bump adoption has been growing in high performance and low-cost flip chip packages. Higher input/output (I/O) density and very fine pitch requirements are driving very small feature sizes such as small bump on a narrow p
Autor:
Reinhard Voelkel
Publikováno v:
2015 20th Microoptics Conference (MOC).
Photolithography is the engine that empowered microelectronics and semiconductor industry for more than 50 years. Photolithography is the enabling process behind the powerful concept of "shrinkage ", also referred to as "die shrink ", the ability to
Publikováno v:
2015 IEEE 11th International Conference on Power Electronics and Drive Systems.
A new 600V high-voltage IC (HVIC) featuring a high noise tolerance is proposed. The purpose of the proposed HVIC is to achieve the high noise tolerance without an increase of the fabrication cost. The basic device concept is to arrange a P-separation
Autor:
Anup Bhalla, Karthik Padmanabhan, Lingpeng Guan, Hamza Yilmaz, Madhur Bobde, Allan Chiu, Jongoh Kim, Wen-Jun Li, Lei Zhang
Publikováno v:
2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
In this paper, a novel trench shielded 600V MOSFET with buried field ring is proposed and demonstrated. The proposed structure achieves an active area die shrink of 35-55% compared to a conventional 600V planar MOSFET. Furthermore, it almost doubles
Publikováno v:
Microelectronics International. 17:23-27
The concept of packaging integrated circuits while they are still in wafer form has captured the imagination of semiconductor manufacturers and packagers around the globe. One such concept, referred to as wide area vertical expansion (WAVETM) technol
Autor:
Hyun-Kee Lee, Min Young Kim
Publikováno v:
SPIE Proceedings.
To use flip chip interconnection technology for semiconductor packages offers a number of possible advantages to the user: reduced signal inductance, reduced power/ground inductance, higher signal density, die shrink, and reduced package footprint. H