Zobrazeno 1 - 10
of 104
pro vyhledávání: '"Dhamin Al-Khalili"'
Publikováno v:
Micromachines, Vol 14, Iss 8, p 1535 (2023)
Artificial intelligence (AI) has revolutionized present-day life through automation and independent decision-making capabilities. For AI hardware implementations, the 6T-SRAM cell is a suitable candidate due to its performance edge over its counterpa
Externí odkaz:
https://doaj.org/article/a2352e3bccc04fb8941c892a674bea0e
Publikováno v:
Micromachines, Vol 13, Iss 8, p 1332 (2022)
Microprocessors use static random-access memory (SRAM) cells in the cache memory design. As a part of the central computing component, their performance is critical. Modern system-on-chips (SoC) escalate performance pressure because only 10–15% of
Externí odkaz:
https://doaj.org/article/56298517d5e748a1bd35cab5d604961f
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2017 (2017)
In this paper, a novel BCD multiplier approach is proposed. The main highlight of the proposed architecture is the generation of the partial products and parallel binary operations based on 2-digit columns. 1 × 1-digit multipliers used for the parti
Externí odkaz:
https://doaj.org/article/978d54807ff54102987727b8458778f5
Publikováno v:
Journal of Electrical and Computer Engineering, Vol 2013 (2013)
We are examining different configurations and circuit topologies for arithmetic components such as adder and compressor circuits using both symmetric and asymmetric work-function FinFETs. Based on extensive characterization data, for the carry genera
Externí odkaz:
https://doaj.org/article/38ce8e8dced8465ab9bec59a3edd1da8
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2009 (2009)
Externí odkaz:
https://doaj.org/article/4fff03812546496585aa9246c7755928
Publikováno v:
Microelectronics Reliability. 129:114464
Publikováno v:
Journal of Electronic Testing. 34:351-362
FinFET technology is one of the most promising candidates in replacing planar MOSFET beyond the 22 nm technology node. However, the complexity of FinFET manufacturing process has caused challenges in reliable device testing. Gate oxide short (GOS) is
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2017 (2017)
In this paper, a novel BCD multiplier approach is proposed. The main highlight of the proposed architecture is the generation of the partial products and parallel binary operations based on 2-digit columns. 1 × 1-digit multipliers used for the parti
Publikováno v:
VTS
Manufacturing complexities due to FinFET's three-dimensional structure and reduced critical dimensions have caused new challenges in achieving reliable device testing. Gate oxide short (GOS) is one of the defects that requires a thorough investigatio
Publikováno v:
CCECE
This paper presents the design of pipelined IEEE 754-2008 decimal floating-point (DFP) multipliers targeting FPGAs. A key component of the architecture is the fixed-point multiplier function which impacts the overall performance and area utilization.