Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Dexter Velez, Sorono"'
Publikováno v:
Advanced Materials Research. 740:289-294
ncreasing functionality accompanied with device miniaturization in microelectronics has led to increased market demand for packages with small form factor. Over the years, embedded wafer level packaging (EWLP) has become an attractive option since it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f23e29c024d548f0110c0d5864b1998
https://doi.org/10.4028/www.scientific.net/amr.740.289
https://doi.org/10.4028/www.scientific.net/amr.740.289
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 3:678-687
This paper focuses on the 3-D numerical methodology development of wafer level compression molding. With its successful application in a two-die-package embedded wafer level encapsulation, flow patterns, velocity, and pressure distributions are compa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c949b0935f8a9d354bdc357fafbc7a45
https://doi.org/10.1109/tcpmt.2012.2220141
https://doi.org/10.1109/tcpmt.2012.2220141
Autor:
David Ho, Bu Lin, Zhaohui Chen, Sharon Pei Siang Lim, Boo Yang Jung, Dexter Velez Sorono, Chai Tai Chong, Han Yong
Publikováno v:
2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).
Currently PoP (Package on Package) has become a main stream of 3D integration for logic devices such as baseband and application processors with high performance memory in mobile application. This PoP has an advantage of a smaller package size with h
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::93e57a2ba6ce56b6814b23e3737cbb86
https://doi.org/10.1109/eptc.2014.7028373
https://doi.org/10.1109/eptc.2014.7028373
Autor:
Seit Wen Wei, Calvin Teo Wei Liang, Srinivasa Rao Vempati, Ser Choong Chong, Lin Bu, Dexter Velez Sorono
Publikováno v:
2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).
The encapsulation of chips with fine pitch micro bump interconnections in chip-to-wafer (C2W) bonding has a known two steps process in wafer level packaging. First step is underfilling process that fills the gap between bumps underneath the chips. Un
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5a1a4d9cce8d0d999d7010ec69c48719
https://doi.org/10.1109/eptc.2013.6745686
https://doi.org/10.1109/eptc.2013.6745686
Publikováno v:
2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).
In this paper, a 60 GHz resonator is designed and implemented on embedded wafer level packaging (EWLP) platform. The resonator is constructed in substrate integrated waveguide (SIW) configuration with the molding compound as the filled in substrate m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f06604e231aebdfce9df5fb5c4a91697
https://doi.org/10.1109/eptc.2013.6745841
https://doi.org/10.1109/eptc.2013.6745841
Publikováno v:
2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).
The rapidly increasing demand of embedded wafer level package (EMWLP) due to its advantages, smaller form factor and flexibility in system level integration leads to the development of reconstructed wafer level encapsulation. The reconstructed wafers
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9eeb9368dbdd4fc28dabbc7d59d6c115
https://doi.org/10.1109/eptc.2012.6507103
https://doi.org/10.1109/eptc.2012.6507103
Autor:
Yuan, Hwang How, Jaafar, Norhanani, Dexter Velez, Sorono, Bum, Lee Jong, Wei, Yeap Yean, Woo, Daniel Rhee Min
Publikováno v:
2015 IEEE 17th Electronics Packaging & Technology Conference (EPTC); 1/1/2015, p1-4, 4p
Autor:
Lim, Sharon Pei-Siang, Ding, Mian Zhi, Dexter Velez, Sorono, Cereno, Daniel Ismael, Lin, Jong Kai, Rao, Vempati Srinivasa
Publikováno v:
2014 IEEE 16th Electronics Packaging Technology Conference (EPTC); 2014, p394-399, 6p
Publikováno v:
2014 IEEE 16th Electronics Packaging Technology Conference (EPTC); 2014, p747-751, 5p
Autor:
Bu, Lin, Ho, Siowling, Dexter Velez, Sorono, Zheng, Boyu, Chong, Ser Choong, Jung, Booyang, Chai, Taichong, Zhang, Xiaowu
Publikováno v:
2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013); 2013, p766-770, 5p