Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Dennis G. Manzer"'
Autor:
B. C. Webb, Steven L. Wright, P.S. Andry, Dennis G. Manzer, Edmund J. Sprogis, B. Dang, Cornelia K. Tsang
Publikováno v:
IBM Journal of Research and Development. 52:571-581
As traditional CMOS scaling becomes progressively more difficult and less beneficial to overall system performance, three-dimensional silicon integration technologies have begun to receive considerable attention. An advanced packaging solution based
Autor:
Chirag S. Patel, Edmund J. Sprogis, Cornelia K. Tsang, P.S. Andry, B. C. Webb, R. Horton, Robert J. Polastre, Steven L. Wright, Leena Paivikki Buchwalter, Dennis G. Manzer, John U. Knickerbocker
Publikováno v:
56th Electronic Components and Technology Conference 2006.
In the past, traditional CMOS scaling has been one of the principal levers to achieve increased system-level performance. Today, scaling is becoming increasingly difficult and less effective, and a range of new two- and three-dimensional silicon inte
Autor:
B. C. Webb, John H. Magerlein, Hua Gan, E.S. Sprogis, Robert J. Polastre, Sri M. Sri-Jayantha, Chirag S. Patel, Steven L. Wright, P.S. Andry, John U. Knickerbocker, Dennis G. Manzer, R. Horton, Evan G. Colgan, John M. Cotte, Cornelia K. Tsang, Leena Paivikki Buchwalter, Gerard McVicker
Publikováno v:
56th Electronic Components and Technology Conference 2006.
A silicon-based system-on-package (SOP) is described. Novel capabilities of SOP are expected to enable lower cost, more efficient and higher performance electronic systems. Newly developed technology elements include: electrical silicon through-vias,
Autor:
Paul S. Andry, Bucknell C. Webb, Cornelia K. Tsang, Edmund J. Sprogis, Chirag S. Patel, John U. Knickerbocker, Dennis G. Manzer
Publikováno v:
MRS Proceedings. 970
As the limits of traditional CMOS scaling are approached, process integration has become increasingly difficult and resulting in a diminished rate of performance improvement over time. Consequently, the search for new two- and three- dimensional sub-
Autor:
Steve Wilson, A. Pelella, Dennis G. Manzer, Moyra K. McManus, Pia Naoko Sanda, Daniel R. Knebel, William V. Huott, Steven E. Steen, Stas Polonsky, Yuen Chan
Publikováno v:
ITC
This paper will provide a case study of a particularly difficult debug problem (the Holey Shmoo problem) which developed while designing the IBM System/390 G6 637 MHz microprocessor chip. Resolution of this problem involved the use of some of today's
Autor:
Steve Wilson, Dennis G. Manzer, Yuen Chan, Moyra K. McManus, Antonio R. Pelella, Daniel R. Knebel, William V. Huott, Steven E. Steen, Pia Naoko Sanda, Stas Polonsky
Publikováno v:
2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).
Picosecond imaging circuit analysis (PICA) is recently demonstrated to be a practical measurement technique of internal timing of ICs. This paper describes application of PICA to analysis of individual MOSFET switching times in the L1 cache write con
Publikováno v:
High-Speed Imaging and Sequence Analysis III.
IBM Research has developed a time resolved imaging technique, Picosecond Imaging Circuit Analysis (PICA), which uses single photon events to analyze signals in modern microprocessors on a picosecond time scale. This paper will describe the experiment
Autor:
Dennis G. Manzer, Dan Knebel, Steven E. Steen, Yuen Chan, Steve Wilson, Tony Pelella, B. Huott, Pia Naoko Sanda, Stas Polonsky, Moyra K. McManus
Publikováno v:
International Symposium for Testing and Failure Analysis.
Picosecond Imaging Circuit Analysis (PICA) is a new technique shown here to be applicable to the analysis of complex VLSI circuits. PICA was used to diagnose a timing failure in the early design of the G6 microprocessor chip. The fault occurred at hi
Publikováno v:
Hard Copy Output.
One of the challenges of 960 dot-per-inch resistive ribbon thermal transfer - R2T2 - printing is the control of energy delivered to the print head to assure very high fidelity printing. A method of manipulating image data to combat the undesired effe
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