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pro vyhledávání: '"Denis V. Dubrov"'
Autor:
Oleg Steinberg, Roman B. Steinberg, Anton P. Bugliy, Boris Ya. Steinberg, Yury V. Mikhailuts, Denis V. Dubrov
Publikováno v:
Procedia Computer Science. 101:435-438
In the following work, a project for compiler that maps program loops onto a processor with programmable accelerator is presented. The processor with programmable architecture could be a system on a chip containing regular computational cores as well
Publikováno v:
Proceedings of 19th Scientific Conference “Scientific Services & Internet – 2017”.
Autor:
Boris Ya. Steinberg, Denis V. Dubrov, Yury V. Mikhailuts, Roman B. Steinberg, Anton P. Bugliy
Publikováno v:
Proceedings of the 12th Central and Eastern European Software Engineering Conference in Russia.
The following work describes a project development of the C compiler for computing systems with programmable architectures. The compiler has been implemented on the base of OPS (Optimizing Parallelizing System, http://ops.rsu.ru) and a converter of C
Autor:
Denis V. Dubrov, Yury V. Mikhailuts, Alexander S. Roshal, Roman B. Steinberg, Boris Ya. Steinberg
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783319219080
PaCT
PaCT
A technique for automatic high-level C program mapping onto compute systems with programmable pipeline architecture is presented in this article. An example of such a system could be a CPUi¾?with an FPGA accelerator or the corresponding system on a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8cb02f3c9003552603cbf855168f2236
https://doi.org/10.1007/978-3-319-21909-7_46
https://doi.org/10.1007/978-3-319-21909-7_46
Autor:
Denis V. Dubrov
Publikováno v:
WGP@ICFP
A metaprogram solving N queens problem is written using Boost MPL library. The solution is tested using different compilers to examine the level of their practical use for complex metaprogramming tasks. The corresponding benchmark results were obtain
Autor:
Alexander S. Roshal, Denis V. Dubrov
Publikováno v:
EWDTS
We present an overview of an experimental converter which automatically generates electronic circuit VHDL descriptions implementing the pipeline loop body computations written in C language. The converter processes tightly nested pipelined loops with