Zobrazeno 1 - 10
of 1 702
pro vyhledávání: '"Delta-Sigma modulator"'
Publikováno v:
Engineering Science and Technology, an International Journal, Vol 57, Iss , Pp 101821- (2024)
A novel solution of the first-order asynchronous delta–sigma modulator (ADSM) is proposed. The circuit is designed for the commercial temperature range (0 °C to 70 °C) in a 28 nm fully depleted silicon on insulator (FD-SOI) technology from STMicr
Externí odkaz:
https://doaj.org/article/05404694dbee472b8dddf07be197c7e6
Publikováno v:
مهندسی مخابرات جنوب, Vol 13, Iss 49, Pp 1-22 (2024)
In this paper, a fourth-order, OTA-free, single-bit, low-consumption discrete-time (DT) delta-sigma (ΔΣ) modulator with CIFF structure is proposed for hearing aid applications. In portable medical devices such as hearing aids that are used permanen
Externí odkaz:
https://doaj.org/article/c087393d7c1e426898d0ec3968f3fbef
Publikováno v:
IEEE Open Journal of the Solid-State Circuits Society, Vol 4, Pp 226-237 (2024)
A fractional-N frequency synthesizer with low total jitter [e.g., $(\Delta \Sigma )$ quantization cancellation using a digital-to-time converter (DTC) (and more recently, DACs) have demonstrated low-jitter performance and are well understood in terms
Externí odkaz:
https://doaj.org/article/9f472b62428147c1908ca680cd346197
Publikováno v:
IEEE Open Journal of the Solid-State Circuits Society, Vol 4, Pp 238-251 (2024)
A fractional-N frequency synthesizer inherently exhibits spurs by virtue of the fact that its output frequency is not an integer multiple of its reference frequency. Until recently, it seemed that fractional spurs were understood and under control. H
Externí odkaz:
https://doaj.org/article/4e8915cf539a4a35884eb0db9c709b45
Autor:
Nahmil Koo
Publikováno v:
IEEE Access, Vol 12, Pp 175742-175751 (2024)
This article introduces a countermeasure against Side-Channel Attacks (SCA) designed for 1st-order Delta-Sigma Modulators (DSM). Initially, the operation of 1st-Order DSM is explained at both the model and circuit levels. The analysis then focuses on
Externí odkaz:
https://doaj.org/article/4e1a9add3832406ba9f98bee1d714769
Publikováno v:
IEEE Open Journal of the Solid-State Circuits Society, Vol 4, Pp 163-175 (2024)
The distinct advantages of low power consumption and hardware compactness make SAR ADCs especially appealing in scaled CMOS technologies, garnering significant attention. The residue left on the capacitor digital-to-analog converter (CDAC) after conv
Externí odkaz:
https://doaj.org/article/260cf35c7d72496bae624ae6ed868b05
Autor:
Kyoung-Ub Cho, Joonho Gil, Chulhyun Park, Kyu-Jin Cho, Jae-Woo Shin, Eun-Seong Kim, Yun-Seong Eo, Ramesh Harjani, Nam-Young Kim, Taehyoun Oh
Publikováno v:
IEEE Access, Vol 12, Pp 142677-142694 (2024)
This paper proposes a low-power design method and a low-noise phase offset calibration technique for a gated ring-oscillator time-to-digital converter (GRO-TDC), which normally consumes a large percentage of most all-digital phase-locked loop (ADPLL)
Externí odkaz:
https://doaj.org/article/6ba1588ca4fb4f74be74196c655afa48
Publikováno v:
IEEE Access, Vol 12, Pp 121753-121779 (2024)
Oversampling analog-to-digital converters (ADC) serve as the backbone of high-performance, high-precision data interfaces, owing to their remarkable ability to filter out quantization noise. This attribute makes them the preferred choice for applicat
Externí odkaz:
https://doaj.org/article/008dd9fcfe08453e9d48873df745d879
Akademický článek
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Autor:
Nasser Erfani Majd, Rezvan Fani
Publikováno v:
ETRI Journal, Vol 45, Iss 1, Pp 150-162 (2023)
The polar delta–sigma modulator (DSM) transmitter architecture exhibits good coding efficiency and can be used for software-defined radio applications. However, the necessity of high clock speed is one of the major drawbacks of using this transmitt
Externí odkaz:
https://doaj.org/article/a239407fced548fca4b96582cc2e3359