Zobrazeno 1 - 10
of 1 878
pro vyhledávání: '"Delay calculation"'
Autor:
S. Abolmaali
Publikováno v:
Iranian Journal of Electrical and Electronic Engineering, Vol 15, Iss 4, Pp 485-501 (2019)
Accurate delay calculation of circuit gates is very important in timing analysis of digital circuits. Waveform shapes on the input ports of logic gates should be considered, in the characterization phase of delay calculation, to obtain accurate gate
Externí odkaz:
https://doaj.org/article/3dcd8aa133434d2bac0842b9a2a11c79
Akademický článek
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Publikováno v:
International Journal of Managing Projects in Business. 13:1219-1261
PurposeAlmost all projects in the world are delayed, and sometimes even lead to the full bankruptcy of their beneficiaries. These delays can be calculated using techniques, but most importantly, there must be a fair and realistic division of delays b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b1e057421f180f7f481e1cf623c937a8
https://doi.org/10.1108/ijmpb-08-2019-0196
https://doi.org/10.1108/ijmpb-08-2019-0196
Publikováno v:
Journal of the Korean Society for Aviation and Aeronautics. 28:47-52
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1dd61544e061c887755062ceb405738c
https://doi.org/10.12985/ksaa.2020.28.2.047
https://doi.org/10.12985/ksaa.2020.28.2.047
Autor:
Yilmaz Hatipkarasulu
Publikováno v:
Construction Innovation. 20:43-60
Purpose This paper aims to present a graphical comparison method for construction schedules, which illustrates the differences for each individual activity. The method overlays the observed differences on a bar chart creating a representation of whet
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::643b1c034d689bfaf1aab39550f9ff11
https://doi.org/10.1108/ci-01-2019-0001
https://doi.org/10.1108/ci-01-2019-0001
Publikováno v:
2021 IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC).
Analysis of efficient electromagnetic waves is a very important problem in many fields. Among them, the problem of Time Delay Estimation (TDE) has been studied for a long time in the field of signal processing, sonar, radar, seismic waves, as well as
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d5999f72a3b0ad52116036a2cdc91c6
https://doi.org/10.1109/apwc52648.2021.9539695
https://doi.org/10.1109/apwc52648.2021.9539695
Publikováno v:
IEEE Internet of Things Journal. 6:692-704
In this paper, an analytical end-to-end (E2E) packet delay modeling is established for multiple traffic flows traversing an embedded virtual network function (VNF) chain in fifth generation communication networks. The dominant-resource generalized pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8bc7a58ac38bdc7bf9537ac2ccd0014c
https://doi.org/10.1109/jiot.2018.2853708
https://doi.org/10.1109/jiot.2018.2853708
Publikováno v:
2021 1st International Conference on Power Electronics and Energy (ICPEE).
Interruption in electrical power supply causes distress in our modern society. Partial discharge (PD) is the most common factor for such failures, and hence it is a prevalent condition monitoring tool for electrical power system utility. Recently, ul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::67caf21a6257e3bdca341fd95f4274ad
https://doi.org/10.1109/icpee50452.2021.9358526
https://doi.org/10.1109/icpee50452.2021.9358526
Autor:
Prabir Saha, S. Diamond Thabah
Publikováno v:
International Journal of Engineering. 34
At present, the reduction of circuit design power is a prime research topic. The reversible computation satisfies the criteria of the power consumption reduction compared to the traditional logic design. Thereby, reversible computation is gaining muc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4cab530802e807bc57982e377a5fb895
https://doi.org/10.5829/ije.2021.34.05b.22
https://doi.org/10.5829/ije.2021.34.05b.22
Publikováno v:
ICCAD
The ever-increasing power of graphics processing units (GPUs) has opened new opportunities for accelerating static timing analysis (STA) to a new milestone. Developing a CPU-GPU parallel STA engine is an extremely challenging job. We need to consider
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7e1b1d7f68be4501039d76e96b440806
https://doi.org/10.1145/3400302.3415631
https://doi.org/10.1145/3400302.3415631