Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Davor Capalija"'
Autor:
Ljubisa Bajic, Syed Zohaib Gilani, James Connolly, Tony Zhou, Milos Trajkovic, Hassan Farooq, Lejla Bajic, Daniel Rosen, Ivan Hamer, Raymond Kim, Joseph W.K. Chu, Aleksandar Cejkov, Alexander Drouillard, Allan Rui, David C. Thompson, Rakesh Shaji Lal, Joy Yu Ting Chen, Davor Capalija, Kei-Ming Kwong, Boris Drazic, Zahi Moudallal, Stanislav Sokorac, Renjith Retnamma, Ivan Matosevic, Shripad Karodi, Utku Aydonat, Emilio Munoz, Djordje Maksimovic, Namal Rajatheva, Almeet Bhullar, Keivan Dabiri, Stephen Alexander Chin, Aleksandar Knezevic, James Sun, Miles Dooley, Jasmina Vasiljevic, Armond Paiva, Kyle Mabee, Dragoljub Ignjatovic, Sean Nijjar, Charles Lee, Andrew Lewycky, Matthew Walker, Akhmed Rakhmati
Publikováno v:
IEEE Micro. 41:50-55
The rapidly growing compute demands of AI necessitate the creation of new computing architectures and approaches. Tenstorrent designed its architecture (embodied in Grayskull and Wormhole devices) to tackle this challenge via two fundamental and syne
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eb4b1da45736afdc54d7abc11d1eeedb
https://doi.org/10.1109/mm.2021.3061912
https://doi.org/10.1109/mm.2021.3061912
Autor:
Sergey Y. Shumarayev, Utku Aydonat, Asit K. Mishra, Aravind Dasu, Debbie Marr, Davor Capalija, Eriko Nurvitadhi, Kevin Nealis, Philip Colangelo, Jeffrey J. Cook, Andrew Ling
Publikováno v:
FPL
FPGAs or ASICs? FPGAs are extremely flexible while ASICs offer top efficiency. We believe that FPGAs and ASICs are better together, to offer flexibility and efficiency. We propose single-package heterogeneous 2.5D integration of FPGAs and ASICs, usin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::674a811fdf2e9387fbca489e3e43b30c
https://doi.org/10.1109/fpl.2018.00027
https://doi.org/10.1109/fpl.2018.00027
Publikováno v:
ISPD
Deep learning inference has become the key workload to accelerate in our AI-powered world. FPGAs are an ideal platform for the acceleration of deep learning inference by combining low-latency performance, power-efficiency, and flexibility. This paper
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::118e2d72683e499c01639a3343792e11
https://doi.org/10.1145/3177540.3177561
https://doi.org/10.1145/3177540.3177561
Autor:
Kevin Nealis, Debbie Marr, Aravind Dasu, Philip Colangelo, Eriko Nurvitadhi, Andrew Ling, Asit K. Mishra, Jeff Cook, Sergey Y. Shumarayev, Utku Aydonat, Davor Capalija
Publikováno v:
FPGA
FPGAs or ASICs? There is a long-running debate on this. FPGAs are extremely flexible while ASICs offer top efficiency but inflexible. We believe that FPGAs and ASICs are better together, to offer both flexible and efficient solutions. We propose sing
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a795ba489026080ad67bbecf1469e37
https://doi.org/10.1145/3174243.3174966
https://doi.org/10.1145/3174243.3174966
Autor:
Srivatsan Krishnan, Eriko Nurvitadhi, Suchit Subhaschandra, Yinger Jack Z, Duncan J. M. Moss, Andrew Ling, Debbie Marr, Davor Capalija
Publikováno v:
FPT
Deep neural networks (DNNs) have gained popularity for their state-of-the-art accuracy and relative ease of use. DNNs rely on a growing variety of matrix multiply operations (i.e., dense to sparse, FP32 to N-bit). We propose an OpenCL-based matrix mu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::49dffe5f846ddbf75c3a94500ae7471a
https://doi.org/10.1109/fpt.2017.8280155
https://doi.org/10.1109/fpt.2017.8280155
Publikováno v:
IWOCL
After decades of research, High-Level Synthesis has finally caught on as a mainstream design technique for FPGAs. However, achieving performance results that are comparable to designing at a hardware description level still remains a challenge. In th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::635afacee196678c2bbdc4d329357ab1
https://doi.org/10.1145/3078155.3078169
https://doi.org/10.1145/3078155.3078169
Publikováno v:
FPGA
Convolutional neural nets (CNNs) have become a practical means to perform vision tasks, particularly in the area of image classification. FPGAs are well known to be able to perform convolutions efficiently, however, most recent efforts to run CNNs on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fdea8bc7bbf79806f34c72bbc791ea6b
https://doi.org/10.1145/3020078.3021738
https://doi.org/10.1145/3020078.3021738
Autor:
Davor Capalija, Tarek S. Abdelrahman
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 24:392-405
We explore the design, implementation, and evaluation of a coarse-grain superscalar processor in the context of the microarchitecture of the Control Processor (CP) of the Multilevel Computing Architecture (MLCA), a novel architecture targeted for mul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6282a6d24a7420e5c52a33681038fff1
https://doi.org/10.1109/tpds.2012.135
https://doi.org/10.1109/tpds.2012.135
Autor:
Davor Capalija, Tarek S. Abdelrahman
Publikováno v:
FPL
Mesh-of-functional-units (mesh-of-FUs) overlays can deliver high-performance because they expose the massively parallel FPGA fabric and have the ability to be customized for different applications. However, a key challenge is how to quickly compile a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::214d64387bd5ad4698ca98256d8e128f
https://doi.org/10.1109/fpl.2014.6927456
https://doi.org/10.1109/fpl.2014.6927456
Autor:
Davor Capalija, Tarek S. Abdelrahman
Publikováno v:
FPL
A major issue facing the widespread use of FPGAs as accelerators is their programmability wall: the difficulty of hardware design and the long synthesis times. Overlays-pre-synthesized FPGA circuits that are themselves reconfigurable - promise to tac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1f0a46b68370ee69c874945240118c69
https://doi.org/10.1109/fpl.2013.6645515
https://doi.org/10.1109/fpl.2013.6645515