Zobrazeno 1 - 5
of 5
pro vyhledávání: '"David Jon Hiner"'
Autor:
SeHwan Hong, David Jon Hiner, EunYoung Lee, JiYeon Ryu, JaeYoon Kim, KyeRyung Kim, JiHun Lee, WonChul Do, JinYoung Khim, Ji Hyun Kim
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
Interposer Package-on-Package (PoP) technology was developed and has been in very high-volume production over the last several years for high-end mobile application processors (APs). This is due to its advantages of good package design flexibility, c
Autor:
Ji Hun Lee, JaeYoon Kim, EunYoung Lee, KyeRyung Kim, WonChul Do, SeHwan Hong, MinKeon Lee, David Jon Hiner, JuHong Shin
Publikováno v:
2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC).
In this work, a hybrid 3D package combining a redistribution layer (RDL) and laminate substrate layer for ultra-thin and high-bandwidth mobile applications are discussed and demonstrated. The motivation behind this hybrid 3D package structure was lev
Autor:
David Jon Hiner, Michael G. Kelly, WonChul Do, SangEun Park, Ji Hyun Kim, MinHwa Chang, AhRa Jo, Youngrae Kim, JaeHun Bae
Publikováno v:
2017 IEEE 67th Electronic Components and Technology Conference (ECTC).
A novel HD-FO package platform was introduced with a hybrid RDL structure. An HD-FO package with hybrid RDL could enables higher routing density and multi die construction in a planner configuration. The 1-µm and submicron RDL wafers were fabricated
Autor:
MinJae Lee, Keun-Soo Kim, Hwankyu Kim, DaeByoung Kang, TaeKyeong Hwang, Juhoon Yoon, David Jon Hiner, Dong Wook Kim, Seokgeun Ahn
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
High throughput interconnection technology has been achieved using a multi-chip gang bonding process with an advanced chip on wafer (CoW) test vehicle (TV). The TV had 30 µm of fine-pitch copper pillar (CuP) and the bonding test was performed using
Autor:
MinJae Lee, Riko Radojcic, KeunSoo Kim, Sam Gu, David Jon Hiner, Michael G. Kelly, Seokgeun Ahn, Hwankyu Kim, DaeByoung Kang, Dong Wook Kim, Ron Huemoeller
Publikováno v:
2015 IEEE 65th Electronic Components and Technology Conference (ECTC).
Advanced chip on wafer (CoW) assembly has emerged as a key assembly technology for enabling advanced silicon nodes and complex integration. Traditional assembly methods for chip attach have proven capable in this approach, but suffer in the area of f