Zobrazeno 1 - 10
of 265
pro vyhledávání: '"David J. Allstot"'
Autor:
Jialin Liu, David J. Allstot
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 70:1429-1438
Publikováno v:
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
Publikováno v:
2022 IEEE Custom Integrated Circuits Conference (CICC).
Autor:
Jialin Liu, David J. Allstot
Publikováno v:
2021 IEEE Biomedical Circuits and Systems Conference (BioCAS).
Publikováno v:
IEEE Circuits and Systems Magazine. 21:40-42
The first publication of a switched-capacitor resistor occurred nearly 150 years ago in James Clark Maxwell’s pioneering book A Treatise on Electricity and Magnetism [1] . He pointed out that the average current through a periodically inverted capa
Publikováno v:
ISCAS
The CMOS switched-capacitor power amplifier (SCPA) proposed in 2011 [1]-[2] achieved much higher system efficiency than conventional transmitter architectures. In this paper, SCPA linearity is also analyzed and improved with new techniques. Specifica
Autor:
David J. Allstot, Jialin Liu
Publikováno v:
ISCAS
Compressed sensing (CS) is a sampling scheme that exploits signal sparsity to reduce the digitizing rate and thus improve analog-to-digital converter (ADC) power efficiency. By decoupling the analog signal frequency and digitizing rate, the ADC sampl
Publikováno v:
ISCAS
The CMOS switched-capacitor power amplifier (SCPA) architecture was disclosed by S.M. Yoo, et al., in 2011 [1]-[2]. It enabled the design of fully-integrated radio frequency (RF) transmitters with much higher power-added efficiency (PAE) than previou
Autor:
Kailash Chandarshekar, Yorgos Palaskas, David J. Allstot, Paolo Madoglio, Parmoon Seddighrad, Hongtao Xu
Publikováno v:
ISCAS
A digital switched-capacitor transformer-combining power amplifier (SCPA) that uses load modulation to achieve efficiency peaking at 0, −6, and −12 dB backoff levels is beneficial for signals with high peak-to-average power ratios (PAPR). The PA
Autor:
Ajmal Vadakkan Kayyil, David J. Allstot, Narayana Bhagirath Thota, Praveen Kumar Venkatachala, Chaiyanut Aueamnuay
Publikováno v:
ISCAS
The g m /I D -based design of analog integrated circuits introduced by Silveira, et al. in 1996 [1] employs an empirical transistor sizing methodology using SPICE-generated lookup tables that enables good agreement between simulations and specificati