Zobrazeno 1 - 10
of 79
pro vyhledávání: '"David H. Albonesi"'
Autor:
Christina Delimitrou, Gonzalo Gonzalez-Pumariega, Amulya Khurana, Neeraj Kulkarni, David H. Albonesi, Christine A. Shoemaker
Publikováno v:
MICRO
Multi-tenancy for latency-critical applications leads to resource interference and unpredictable performance. Core reconfiguration opens up more opportunities for application colocation, as it allows the hardware to adjust to the dynamic performance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b55944d050b811ad0fdbcbf03e36234c
https://doi.org/10.1109/micro50266.2020.00060
https://doi.org/10.1109/micro50266.2020.00060
Publikováno v:
MICRO
Sparse-sparse matrix multiplication (SpGEMM) is a computation kernel widely used in numerous application domains such as data analytics, graph processing, and scientific computing. In this work we propose MatRaptor, a novel SpGEMM accelerator that is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8134d56945d0130a368a555d61746b27
https://doi.org/10.1109/micro50266.2020.00068
https://doi.org/10.1109/micro50266.2020.00068
Publikováno v:
HPCA
Tensor factorizations are powerful tools in many machine learning and data analytics applications. Tensors are often sparse, which makes sparse tensor factorizations memory bound. In this work, we propose a hardware accelerator that can accelerate bo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3668d49e151665af12ed0e2778d6d41b
https://doi.org/10.1109/hpca47549.2020.00062
https://doi.org/10.1109/hpca47549.2020.00062
Autor:
Timothy G. Mattson, Wenguang Chen, Paul Petersen, Christopher J. Hughes, Zhiru Zhang, David H. Albonesi, Adam W. Herr, Pradeep Dubey, Nitish Srivastava, Vivek Sarkar, Hongbo Rong, Huanqi Cao, Prithayan Barua, Geoff Lowney, Guanyu Feng
Publikováno v:
FCCM
We present a language and compilation framework for productively generating high-performance systolic arrays for dense tensor kernels on spatial architectures, including FPGAs and CGRAs. It decouples a functional specification from a spatial mapping,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e27bf3c310bf6c44a32809bbb371f19
https://doi.org/10.1109/fccm.2019.00033
https://doi.org/10.1109/fccm.2019.00033
Publikováno v:
IJCNN
Deep learning models are computationally expensive and their performance depends strongly on the underlying hardware platform. General purpose compute platforms such as GPUs have been widely used for implementing deep learning techniques. However, wi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b04d81720a9e6a2d160bc37a7d82ea87
https://doi.org/10.1109/ijcnn.2017.7965844
https://doi.org/10.1109/ijcnn.2017.7965844
Publikováno v:
ISPASS
The advent of high speed input sensor and display technologies and the drive for faster interactive response suggests that human-computer interaction (HCI) task processing deadlines of a few milliseconds or less may be required in future handheld dev
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82da4d27af0d206f09949e068ccc222d
https://doi.org/10.1109/ispass.2017.7975289
https://doi.org/10.1109/ispass.2017.7975289
Autor:
Wei Huang, Leonardo Piga, Joseph L. Greathouse, Abhinandan Majumdar, Indrani Paul, David H. Albonesi
Publikováno v:
HPCA
Modern processors can greatly increase energy efficiency through techniques such as dynamic voltage and frequency scaling. Traditional predictive schemes are limited in their effectiveness by their inability to plan for the performance and energy cha
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1e64655aea5e25b72e3827e7e10bb1de
https://doi.org/10.1109/hpca.2017.34
https://doi.org/10.1109/hpca.2017.34
Publikováno v:
ISCA
Future microprocessors may become so power constrained that not all transistors will be able to be powered on at once. These systems will be required to nimbly adapt to changes in the chip power that is allocated to general-purpose cores and to speci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0a6d7a2f3efa4136f069c3431a1f71d6
https://doi.org/10.1145/2508148.2485924
https://doi.org/10.1145/2508148.2485924
Publikováno v:
2016 ACM/IEEE 7th International Conference on Cyber-Physical Systems (ICCPS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a85f05579b4df63e7eb5927094f11107
https://doi.org/10.1109/iccps.2016.7479070
https://doi.org/10.1109/iccps.2016.7479070
Autor:
David H. Albonesi, Mark J. Cianchetti
Publikováno v:
ACM Journal on Emerging Technologies in Computing Systems. 7:1-20
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable chip performance within a given power envelope. While CMOS-compatible na
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8191b406abc54019d25de7474f2c8520
https://doi.org/10.1145/1970406.1970411
https://doi.org/10.1145/1970406.1970411