Zobrazeno 1 - 10
of 13 324
pro vyhledávání: '"David, Z."'
Optical proximity correction (OPC) is crucial for pushing the boundaries of semiconductor manufacturing and enabling the continued scaling of integrated circuits. While pixel-based OPC, termed as inverse lithography technology (ILT), has gained resea
Externí odkaz:
http://arxiv.org/abs/2408.08969
This paper presents AutoMarks, an automated and transferable watermarking framework that leverages graph neural networks to reduce the watermark search overheads during the placement stage. AutoMarks's novel automated watermark search is accomplished
Externí odkaz:
http://arxiv.org/abs/2407.20544
Analog front-end design heavily relies on specialized human expertise and costly trial-and-error simulations, which motivated many prior works on analog design automation. However, efficient and effective exploration of the vast and complex design sp
Externí odkaz:
http://arxiv.org/abs/2407.07346
In analog circuits, process variation can cause unpredictability in circuit performance. Common-centroid (CC) type layouts have been shown to mitigate process-induced variations and are widely used to match circuit elements. Nevertheless, selecting t
Externí odkaz:
http://arxiv.org/abs/2407.00817
Analog layout synthesis faces significant challenges due to its dependence on manual processes, considerable time requirements, and performance instability. Current Bayesian Optimization (BO)-based techniques for analog layout synthesis, despite thei
Externí odkaz:
http://arxiv.org/abs/2406.05250
Autor:
Lai, Yao, Lee, Sungyoung, Chen, Guojin, Poddar, Souradip, Hu, Mengkang, Pan, David Z., Luo, Ping
Analog circuit design is a significant task in modern chip technology, focusing on the selection of component types, connectivity, and parameters to ensure proper circuit functionality. Despite advances made by Large Language Models (LLMs) in digital
Externí odkaz:
http://arxiv.org/abs/2405.14918
Across a wide range of hardware scenarios, the computational efficiency and physical size of the arithmetic units significantly influence the speed and footprint of the overall hardware system. Nevertheless, the effectiveness of prior arithmetic desi
Externí odkaz:
http://arxiv.org/abs/2405.06758
Physical design watermarking on contemporary integrated circuit (IC) layout encodes signatures without considering the dense connections and design constraints, which could lead to performance degradation on the watermarked products. This paper prese
Externí odkaz:
http://arxiv.org/abs/2404.18407
Autor:
Ning, Shupeng, Zhu, Hanqing, Feng, Chenghao, Gu, Jiaqi, Jiang, Zhixing, Ying, Zhoufeng, Midkiff, Jason, Jain, Sourabh, Hlaing, May H., Pan, David Z., Chen, Ray T.
In recent decades, the demand for computational power has surged, particularly with the rapid expansion of artificial intelligence (AI). As we navigate the post-Moore's law era, the limitations of traditional electrical digital computing, including p
Externí odkaz:
http://arxiv.org/abs/2403.14806
This paper proposes ISDC, a novel feedback-guided iterative system of difference constraints (SDC) scheduling algorithm for high-level synthesis (HLS). ISDC leverages subgraph extraction-based low-level feedback from downstream tools like logic synth
Externí odkaz:
http://arxiv.org/abs/2401.12343