RDF : Un modèle de calcul flot de données reconfigurable

Autor: Shafiei, Arash

Publikováno v: Embedded Systems. Université Grenoble-Alpes, 2021. English. ⟨NNT : ⟩

Dataflow Models of Computation (MoCs) are used to model stream processing applications in a concurrent fashion. Those MoCs are widely used in domains such digital signal processing, multimedia processing, telecommunications, and automatic control. In

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od_______165::7adcb0564014afea1fc2202ee0f37a88
https://theses.hal.science/tel-03531869/file/thesis.pdf

Study and implementation of algorithms for the mapping and scheduling of dataflow applications

Autor: Deroui, Hamza

Publikováno v: Traitement du signal et de l'image [eess.SP]. INSA de Rennes, 2019. Français. ⟨NNT : 2019ISAR0022⟩

The complexity of Multiprocessor System-on-Chip (MPSoC) architectures is increasing exponentially to meet the rising computation power demand of Digital Signal Processor (DSP) applications. Modern MPSoC architectures like the many-cores architectures

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::b55cdc03be6687afe1931953ca0a1a72
https://tel.archives-ouvertes.fr/tel-02903493

DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping

Autor: Alfonso Rodriguez, Eduardo de la Torre, Florian Arrestier, Karol Desnos, Leonardo Suriano, Julien Heulot, Maxime Pelcat

Publikováno v: Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2019, 71, pp.102882. ⟨10.1016/j.micpro.2019.102882⟩
Microprocessors and Microsystems: Embedded Hardware Design
Microprocessors and Microsystems: Embedded Hardware Design, 2019, 71, pp.102882. ⟨10.1016/j.micpro.2019.102882⟩

Heterogeneous Multiprocessor Systems-on-a-Chip (MPSoCs) with programmable hardware acceleration are currently gaining market share in the embedded device domain. Largest MPSoCs combine several software processing cores with programmable logic. In the

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f0ee2afdc66765d79a01ab8e2706c821
https://doi.org/10.1016/j.micpro.2019.102882

PiSDF: Parameterized & Interfaced Synchronous Dataflow for MPSoCs Runtime Reconfiguration

Autor: Desnos, Karol, Heulot, Julien

Publikováno v: 1st Workshop on MEthods and TOols for Dataflow PrOgramming (METODO), proceedings
1st Workshop on MEthods and TOols for Dataflow PrOgramming (METODO)
1st Workshop on MEthods and TOols for Dataflow PrOgramming (METODO), ECSI, Oct 2014, Madrid, Spain

International audience; Dataflow models of computation are widely used for the specification, analysis, and optimization of Digital Signal Processing (DSP) applications. In this talk, we present the Parameterized and Interfaced Synchronous Dataflow (

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::c2b89c3af61a12e38fa0227bc4bc0a9d
https://hal.archives-ouvertes.fr/hal-01075114/file/metodo.pdf

Ordonnancement temps-réel des graphes flots de données

Autor: Bouakaz, Adnan

Publikováno v: Other [cs.OH]. Université Rennes 1, 2013. English. ⟨NNT : 2013REN1S103⟩
Other [cs.OH]. Université de Rennes, 2013. English. ⟨NNT : 2013REN1S103⟩

The ever-increasing functional and nonfunctional requirements in real-time safety-critical embedded systems call for new design flows that solve the specification, validation, and synthesis problems. Ensuring key properties, such as functional determ

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::a4636804d43ffb9e8106c4c08db0a3cb
https://theses.hal.science/tel-00945453