Výsledky vyhledávání - "Das, Teerath"

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Issues and Their Causes in WebAssembly Applications: An Empirical Study

Autor: Waseem, Muhammad, Das, Teerath, Ahmad, Aakash, Liang, Peng, Mikkonen, Tommi

WebAssembly (Wasm) is a binary instruction format designed for secure and efficient execution within sandboxed environments -- predominantly web apps and browsers -- to facilitate performance, security, and flexibility of web programming languages. I

Externí odkaz: http://arxiv.org/abs/2311.00646

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ChatGPT as a Software Development Bot: A Project-based Study

Autor: Waseem, Muhammad, Das, Teerath, Ahmad, Aakash, Liang, Peng, Fehmideh, Mahdi, Mikkonen, Tommi

Artificial Intelligence has demonstrated its significance in software engineering through notable improvements in productivity, accuracy, collaboration, and learning outcomes. This study examines the impact of generative AI tools, specifically ChatGP

Externí odkaz: http://arxiv.org/abs/2310.13648

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Akademický článek

Investigating Novice Developers' Code Commenting Trends Using Machine Learning Techniques.

Autor: Niazi, Tahira¹ (AUTHOR), Das, Teerath² (AUTHOR), Ahmed, Ghufran³ (AUTHOR), Waqas, Syed Muhammad⁴ (AUTHOR), Khan, Sumra¹ (AUTHOR), Khan, Suleman⁵ (AUTHOR) skhan92@uclan.ac.uk, Abdelatif, Ahmed Abdelaziz⁶ (AUTHOR), Wasi, Shaukat¹ (AUTHOR)

Publikováno v: Algorithms. Jan2023, Vol. 16 Issue 1, p53. 19p.

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FPGA Based Low Power DES Algorithm Design And Implementation using HTML Technology

Autor: Thind, Vandana, Pandey, Bishwajeet, Kalia, Kartik, Hussain, Dil muhammed Akbar, Das, Teerath, Kumar, Tanesh

Publikováno v: Thind, V, Pandey, B, Kalia, K, Hussain, D M A, Das, T & Kumar, T 2016, ' FPGA Based Low Power DES Algorithm Design And Implementation using HTML Technology ', International Journal of Software Engineering and Its Application, vol. 10, no. 6, pp. 81-92 . < http://www.sersc.org/journals/IJSEIA/vol10_no6_2016/7.pdf >

In this particular work, we have done power analysis of DES algorithm implemented on 28nm FPGA using HTML (H-HSUL, T-TTL, M-MOBILE_DDR, L-LVCMOS) technology. In this research, we have used high performance software Xilinx ISE where we have selected f

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::8dce71643d422dddece6370ff95e54bf
https://vbn.aau.dk/da/publications/e7648c22-2a83-4c71-8325-7f7ea5877afc

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SSTL Based Low Power Thermal Efficient WLAN Specific 32bit ALU Design on 28nm FPGA

Autor: Kalia, Kartik, Pandey, Bishwajeet, Das, Teerath, Hussain, Dil Muhammed Akbar

Publikováno v: Kalia, K, Pandey, B, Das, T & Hussain, D M A 2016, ' SSTL Based Low Power Thermal Efficient WLAN Specific 32bit ALU Design on 28nm FPGA ', Indian Journal of Science and Technology, vol. 9, no. 10 . < http://www.indjst.org/index.php/indjst/article/view/88080/68068 >

In this paper we have designed a Thermal energy efficient 32Bit ALU for network processor, the main objective of this design is to provide better thermal efficiency with respect to existing designs. For that purpose we have used six different members

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::5680c11dd907d12d3475e560f5d43e53
https://vbn.aau.dk/ws/files/265980849/88080_165064_2_PB.pdf

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