Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Dario Korolija"'
Publikováno v:
Proceedings of the 1st Workshop on SErverless Systems, Applications and MEthodologies (SESAME '23)
In this short paper we investigate the combination of two emerging technologies: the tight provisioning requirements of Serverless computing and the acceleration potential of FPGAs. Serverless platforms suffer from container overheads, notably cold s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::62bd771930cad219a0fe3ad2de3808c2
https://hdl.handle.net/20.500.11850/610035
https://hdl.handle.net/20.500.11850/610035
Autor:
David Cock, Abishek Ramdas, Daniel Schwyn, Michael Giardino, Adam Turowski, Zhenhao He, Nora Hossle, Dario Korolija, Melissa Licciardello, Kristina Martsenko, Reto Achermann, Gustavo Alonso, Timothy Roscoe
Publikováno v:
Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems.
Publikováno v:
FPL
2021 31st International Conference on Field-Programmable Logic and Applications (FPL)
2021 31st International Conference on Field-Programmable Logic and Applications (FPL)
The massive deployment of FPGAs in data centers is opening up new opportunities for accelerating distributed applications. However, developing a distributed FPGA application remains difficult for two reasons. First, commonly available development fra
Publikováno v:
Applied Cryptography and Network Security ISBN: 9783030783747
ACNS (2)
ACNS (2)
Due to the rapidly growing number of devices that need to communicate securely, there is still significant interest in the development of efficient encryption schemes. It is important to maintain a portfolio of different constructions in order to ena
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::88dc5410f0db103f6858b53c6760e246
https://doi.org/10.1007/978-3-030-78375-4_9
https://doi.org/10.1007/978-3-030-78375-4_9
Autor:
Mirjana Stojilovic, Dario Korolija
Publikováno v:
FPGA
FPGA routing is one the longest steps in FPGA compilation, often preventing fast edit-compile-test cycles in prototyping and development. There have been attempts to accelerate FPGA routing using algorithmic improvements, multi-core or multi-CPU plat
Autor:
Dario Korolija, Mirjana Stojilovic
Publikováno v:
IPDPS Workshops
FPGA routing is one of the most time-consuming steps of FPGA compilation, often preventing fast edit-compile-test cycles in prototyping and development. There have been attempts to accelerate FPGA routing using algorithmic improvements, multi-core or
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b8809e70cdd45c89044e21a1dd0b19d2
https://infoscience.epfl.ch/record/271583
https://infoscience.epfl.ch/record/271583