Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Danish Anis Khan"'
Autor:
Christos Strydis, Stavros Tzilis, Alirad Malek, Ioannis Sourdis, Georgios Smaragdos, Danish Anis Khan
Publikováno v:
IEEE Micro. Chips, Systems, Software and Applications, 36(1), 35-45. IEEE Computer Society
This article presents a chip multiprocessor (CMP) design that mixes coarse- and fine-grained reconfigurability to increase core availability of safety-critical embedded systems in the presence of hard errors. The authors conducted a comprehensive des
Autor:
Christos Strydis, Georgios Smaragdos, Ioannis Sourdis, Alirad Malek, Danish Anis Khan, Stavros Tzilis
Publikováno v:
DFTS
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, 191-196
STARTPAGE=191;ENDPAGE=196;TITLE=Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, 191-196
STARTPAGE=191;ENDPAGE=196;TITLE=Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015
Permanent faults on a chip are often tolerated using spare resources. In the past, sparing has been applied to Chip Multiprocessors (CMPs) at various granularities of substitutable units (SUs). Entire processors, pipeline stages or even individual fu
Autor:
Georgios Smaragdos, Stavros Tzilis, Alirad Malek, Ioannis Sourdis, Christos Strydis, Danish Anis Khan
Publikováno v:
IPDPS Workshops
Proceedings-IEEE 28th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2014, 141-150
STARTPAGE=141;ENDPAGE=150;TITLE=Proceedings-IEEE 28th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2014
Proceedings-IEEE 28th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2014, 141-150
STARTPAGE=141;ENDPAGE=150;TITLE=Proceedings-IEEE 28th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2014
Recent trends in semiconductor technology have dictated the constant reduction of device size. One negative effect stemming from the reduction in size and increased complexity is the reduced device reliability. This paper is centered around the matte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0137d61491f6366cf44e3a3a0614c2ee
https://doi.org/10.1109/ipdpsw.2014.20
https://doi.org/10.1109/ipdpsw.2014.20
Autor:
Georgios Smaragdos, Ioannis Sourdis, Alirad Malek, Danish Anis Khan, Stavros Tzilis, Christos Strydis
Publikováno v:
Proceedings-IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 141-146
STARTPAGE=141;ENDPAGE=146;TITLE=Proceedings-IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
DFT
STARTPAGE=141;ENDPAGE=146;TITLE=Proceedings-IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
DFT
Reconfigurable hardware can be employed to tolerate permanent faults. Hardware components comprising a System-on-Chip can be partitioned into a handful of substitutable units interconnected with reconfigurable wires to allow isolation and replacement
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b1115421c918a63a9fba7d61fa77cd3c
https://pure.eur.nl/en/publications/a21ef0b3-f9e4-4ad6-bcc7-7042bd463cd8
https://pure.eur.nl/en/publications/a21ef0b3-f9e4-4ad6-bcc7-7042bd463cd8