Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Daniel Scevola"'
Autor:
Didier Campos, P. Coudrain, Yorrick Exbrayat, Lucile Arnaud, Stephane Minoret, F. Ponthenier, Andrea Vinci, Severine Cheramy, Alain Gueugnot, Daniel Scevola, Cesar Fuguet Tortolero, P. Chausse, Roselyne Segaud, Giovanni Romano, Christophe Aumont, Didier Lattard, Jean Charbonnier, Pierre-Emile Philip, C. Ribiere, Arnaud Garnier, Jean Michailos, Mathilde Gottardi, Raphael Eleouet, Frédéric Berger, Eric Guthmuller, Gilles Simon, Jerome Beltritti, Gilles Romero, Maxime Argoud, Denis Dutoit, Alexis Farcy, Nacima Allouti, Therry Mourier, Remi Velard, Pascal Vivet, Corinne Legalland
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
We report the first successful technology integration of chiplets on an active silicon interposer, fully processed, packaged and tested. Benefits of chiplet-based architectures are discussed. Built up technology is presented and focused on 3D interco
Autor:
C. Euvrard, P. Lamontagne, C. Sart, S. Mermoz, E. Deloffre, Hélène Fremont, A. Jouve, Lucile Arnaud, H. Bilgen, Alexis Farcy, Yann Henrion, N. Bresson, M. Arnoux, Sandrine Lhostis, F. Andre, Joris Jourdon, V. Balan, S. Guillaumet, Stephane Moreau, Y. Exbrayat, J. Chossat, A-L. Martin, C. Charles, Daniel Scevola, S. Cheramy, D. Bouchu
Publikováno v:
Proceedings of IEDM 2018
Proceedings of IEDM 2018, 2018, San Francisco, United States
2018 IEEE International Electron Devices Meeting (IEDM)
2018 IEEE International Electron Devices Meeting (IEDM), Dec 2018, San Francisco, France. pp.7.3.1-7.3.4, ⟨10.1109/IEDM.2018.8614570⟩
Proceedings of IEDM 2018, 2018, San Francisco, United States
2018 IEEE International Electron Devices Meeting (IEDM)
2018 IEEE International Electron Devices Meeting (IEDM), Dec 2018, San Francisco, France. pp.7.3.1-7.3.4, ⟨10.1109/IEDM.2018.8614570⟩
Hybrid bonding is a high-density technology for 3D integration but further interconnect scaling down could jeopardize electrical and reliability performance. A study of the influence of hybrid bonding pitch shrinkage on a 3D stacked backside illumina
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a5c2f74963bc50461c8719aaaab34a68
https://hal.archives-ouvertes.fr/hal-02517231
https://hal.archives-ouvertes.fr/hal-02517231
Autor:
C. Scibetta, S. Beaurepaire, F. Fournel, A. Roman, S. Chevalliez, C. Fenouillet-Beranger, X. Garros, Xavier Federspiel, J. Aubin, V. Larrey, Perrine Batude, F. Kouemeni-Tchouake, F. Ponthenier, J-B. Pin, Daniel Scevola, Lucile Arnaud, F. Aussenac, C. Guerin, P. Acosta-Alba, V. Mazzocchi, Sebastien Kerdiles, H. Fontaine, Shay Reboh, P. Perreau, Sylvain Maitrejean, Laurent Brunet, N. Rambal, M. Vinet, Pascal Besson, Christophe Morales, T. Lardin, V. Balan, Vincent Jousseaume, D. Ney, F. Mazen, Francois Andrieu
Publikováno v:
2018 IEEE International Electron Devices Meeting (IEDM)
The 3D sequential integration, of active devices requires to limit the thermal budget of top tier processing to low temperature (LT) (i.e. $\mathrm{T}_{\text{TOP}}=500^{\circ}\mathrm{C})$ in order to ensure the stability of the bottom devices. Here w
Autor:
Yann Henrion, Sandrine Lhostis, Stephane Moreau, Daniel Scevola, V. Balan, Francois Guyader, Carine Besset, David Bouchu, Anne-Lise Le Berrigo, E. Deloffre, A. Jouve, Julien Pruvost, Sebastien Mermoz
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
This paper presents, for the first time, an electromigration study for a hybrid bonding-based integration for advanced image sensor applications. This work demonstrates that the hybrid bonding module has no impact on the electromigration resistance o
Autor:
Lea Di Cioccio, Anne Marie Charvet, Dominique Lafond, Laurent Clavelier, Patrice Gergaud, Laurent Bally, Maurice Rivoire, Daniel Scevola, Marc Zussy, Pierric Gueguen
Publikováno v:
ECS Transactions. 16:31-37
3D technology will be the next step for the development of microelectronic devices. Vertical interconnection is one of the challenging issue. Metal bonding might be one of the possible technique to address it. In this work, direct Cu/Cu bonding at ro
Autor:
Maurice Rivoire, Clement Chaffard, Aurelien Seignard, Daniel Scevola, V. Balan, Catherine Euvrard
Publikováno v:
Proceedings of International Conference on Planarization/CMP Technology 2014.
This paper presents the development of CMP process optimization in order to obtain very good bondability of tungsten wafers. Surface quality of polished tungsten wafers under different conditions is analyzed through statistical tools like standard de
Autor:
H. Feldis, Stephane Minoret, N. Sillon, R. Eleouet, Daniel Scevola, Perceval Coudrain, T. Enot, R. Segaud, Mathilde Gottardi, I. Charbonnier, A. Charpentier, C. Ribiere, D. Marseilhan, M. Assous, V. Loup, Gilles Romero, Thierry Mourier, Nacima Allouti, J. P. Bally, M. Pellat, A. Roman, L. Gabette, C. Laviron, Thomas Magis, E. Dupuy, B. Martin, C. Ratin
Publikováno v:
2013 IEEE International Interconnect Technology Conference - IITC.
3D integration, also referred as “More than Moore” approach is considered as the most attractive alternative to “More Moore” concept in order to increase circuit functionalities and performances while keeping reasonable cost of integrated dev
Autor:
Lea Di Cioccio, Daniel Scevola, Laurent Bally, Maurice Rivoire, Laurent Clavelier, Anne Marie Charvet, Dominique Lafond, Marc Zussy, Pierric Gueguen
Publikováno v:
2008 International Interconnect Technology Conference.
In 3D integration circuits, metal bonding is a key stage for stacking wafers. In this contribution, the direct Cu/Cu bonding at atmospheric pressure is investigated. At room temperature, a 2.8 J/m2 bonding toughness is achieved without copper oxide a
Autor:
Daniel Scevola, Lea DiCioccio, Pierric Gueguen, Dominique Lafond, Maurice Rivoire, Jean Pierre Gonchond, Patrice Gergaud, Marc Zussy, Laurent Clavelier
Publikováno v:
Materials Research Society Symposium Proceedings.
Autor:
M. Savoye, Gérard Passemard, Sylvain Maitrejean, Daniel Scevola, Vincent Jousseaume, P. Leduc
Publikováno v:
Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..
In-situ friction characterization during chemical-mechanical polishing (CMP) was investigated to understand delamination mechanisms of a porous ultra low-k (ULK)/Cu stack. By quantifying the delaminated area within the wafer, it was shown that adhesi