Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Daniel Sallaerts"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 33:1130-1133
A U-interface line driver for a single-chip ISDN (integrated services digital network) NT (network termination) in an advanced 3.3-V, 0.5-/spl mu/m CMOS technology is presented. It features a THD (total harmonic distortion) better than -68 dB for an
Autor:
D.H. Rabaey, Daniel Sallaerts, R. Granek, Peter Paul Frans Reusens, A. Vanwelsenaers, J.J.J. Haspeslagh
Publikováno v:
IEEE Journal of Solid-State Circuits. 25:1450-1457
The modulator IC is a mixed analog/digital transceiver component in a chip set that is designed for the hand-held terminals of the pan-European 900-MHz Groupe Special Mobile (GSM) digital cellular radio network. The concept of the radio-frequency env
Publikováno v:
1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
This paper will describe a four-chip set that provides 160Kb/s transmission for subscriber line lengths up to 10 km. An adaptive equalizer and echo caneler chips, built up of cellular systolic arrays are included in the system. Both chips are impleme
Publikováno v:
1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
This report will describe the implementation of a transceiver based on echo-cancelling, block code and single baud sampling techniques. A BER lower than 10-7has been obtained on loops up to 8km. The digital implementation in 2μm CMOS has resulted in
Publikováno v:
1988., IEEE International Symposium on Circuits and Systems.
The authors describe a cost-effective and flexible approach to introducing the ISDN (integrated-services digital network) into System 12 with respect to CMOS and nMOS integrated circuits. The chip set includes three transmission devices for basic or
Autor:
Peter Paul Frans Reusens, L. Cloetens, M. De Langhe, S. Van hoogenbemt, Daniel Sallaerts, Joannes Mathilda Josephus Sevenhans
Publikováno v:
Sixth Annual IEEE International ASIC Conference and Exhibit.
A device designed for clock extraction in an ATM optical network for a fiber in the loop system operating at 155/622 Mb/s is presented. The device applies a new clock phase alignment technique to recover the clock/data signal from up to 16 remote nod
Publikováno v:
1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
A broadband ISDN (integrated services digital network) line transmission chip for 1.2 Gb/s is described. Two technologies are employed: BiCMOS to handle 622-Mb/s off-board interfaces, and CMOS to handle the high-complexity functions. Throughout the s
Publikováno v:
1990 37th IEEE International Conference on Solid-State Circuits.
The modulator IC has been designed to integrate all analog baseband processing components of the European Groupe Special Mobile (GSM) digital cellular radio terminals onto a single component. The IC is located at the interface of the analog 900-MHz r
Autor:
Jan Sevenhans, D.H. Rabaey, B.J. De Ceulaer, Daniel Sallaerts, R.F. Dierckx, Didier Rene Haspeslagh
Publikováno v:
IEEE Journal of Solid-State Circuits. 22:1011-1021
The authors discuss system and implementation aspects of a 144 kbit/s one-chip U-transceiver based on echo-cancellation techniques using the MMS43 line code and a Barker synchronization word for bit and frame timing, and including a 1-kb/s transparen