Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Daniel Muller-Gritschneder"'
Autor:
Raphael Stahl, Wolfgang Kunz, Michael Schwarz, Ulf Schlichtmann, Daniel Muller-Gritschneder, Dominik Stoffel
Publikováno v:
DAC
Customizing embedded computing platforms to specific application domains often necessitates optimizing the firmware and/or the HW/SW interface under tight resource constraints. Such optimizations frequently alter the communication between the firmwar
Autor:
Cezar Reinbrecht, Ulf Schlichtmann, Uzair Sharif, Tim Fritzmann, Daniel Muller-Gritschneder, Johanna Sepulveda
Publikováno v:
DATE
Increasingly complex and powerful Systems-on-Chips (SoCs), connected through a 5G network, form the basis of the Internet-of-Things (IoT). These technologies will drive the digitalization in all domains, e.g. industry automation, automotive, avionics
Autor:
Mehdi B. Tahoori, Hananeh Aliee, Fabian Oboril, Alexandra Listl, Veit B. Kleeberger, Michael Glaß, Mojtaba Ebrahimi, Ulf Schlichtmann, Norbert Wehn, Jürgen Teich, Liang Chen, Daniel Muller-Gritschneder, Faramarz Khosravi, Christian Weis
Publikováno v:
it - Information Technology. 57:159-169
The increasing error susceptibility of semiconductor devices has put reliability in the focus of modern design methodologies. Low-level techniques alone cannot economically tackle this problem. Instead, counter measures on all system layers from devi
Publikováno v:
AISTECS@HiPEAC
With increasing density on circuits, more cores are integrated. Networks-on-chip (NoCs) is emerged as a solution for interconnect. Many router architectures, NoC topologies and routing algorithms are developed to improve NoC design. This brings a lar
Publikováno v:
2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).
Divide and conquer is already a proven strategy to handle the complexity of state-of-the-art SoCs. For any minor or major revision of an SoC, difficult decisions about its architecture have to be made at very early stages of the design cycle. System
Publikováno v:
DAC
Increased hardware IP reuse is required to meet the productivity demands for the future complex Systems-on-Chip (SoC). Nowadays, IP integration is enabled using standardized meta-data formats such as IP-XACT. We present a new concept called grammar-b
Publikováno v:
INA-OCMC@HiPEAC
Next to performance, it becomes increasingly important that Networks-on-Chip (NoCs) also provide security features such as access control, authentication and availability. They are usually implemented by firewalls at the network interfaces (NIs) of t
Autor:
A. von Schwerin, Daniel Muller-Gritschneder, Christoph Kuznik, Oliver Bringmann, Moomen Chaari, Wolfgang H. Müller, Hoang M. Le, Th. Kruse, Jan-Hendrik Oetjens, Wolfgang Rosenstiel, Frank Poppen, Kim Grüttner, Alexander Viehl, S. Roth, Andreas Mauderer, Markus Becker, Hendrik Post, Wolfgang Ecker, Nico Bannow, Bogdan-Andrei Tabacaru, Ulf Schlichtmann, Rolf Drechsler, Samarjit Chakraborty, Sebastian Reiter, Andreas Burger
Publikováno v:
DAC
Intelligent automotive electronics significantly improved driving safety in the last decades. With the increasing complexity of automotive systems, dependability of the electronic components themselves and of their interaction must be assured to avoi
Publikováno v:
ISIC
Proceedings of the 2014 14th International Symposium on Integrated Circuits (ISIC), 10-12 December 2014, Singapore, 464-467
STARTPAGE=464;ENDPAGE=467;TITLE=Proceedings of the 2014 14th International Symposium on Integrated Circuits (ISIC), 10-12 December 2014, Singapore
Proceedings of the 2014 14th International Symposium on Integrated Circuits (ISIC), 10-12 December 2014, Singapore, 464-467
STARTPAGE=464;ENDPAGE=467;TITLE=Proceedings of the 2014 14th International Symposium on Integrated Circuits (ISIC), 10-12 December 2014, Singapore
Past years have seen intense research on reliability techniques for error detection recovery at various levels ranging from circuit level up to architectural level or even software level. In such scenarios, affordable techniques for error correction
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b623d74340d198de7af67622dc1ace5f
https://doi.org/10.1109/isicir.2014.7029568
https://doi.org/10.1109/isicir.2014.7029568
Publikováno v:
ASP-DAC
To date, there still lacks a way to accurately simulate data memory accesses in source-level simulation (SLS) of host-compiled embedded SW. The difficulty lies in that the accessed addresses for the load and store instructions can not be statically d