Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Daniel C. Murray"'
Autor:
Jeffrey S. Hickman, Feng Guo, Daniel C Murray, Richard J. Hanowski, Gene Bergoffen, Richard Bishop
Publikováno v:
Journal of Intelligent Transportation Systems. 16:177-183
The purpose of this study was to identify the safety impacts of speed limiters in commercial truck fleets. The primary safety analysis was a focus on the reduction in truck crashes that could have been avoided or mitigated with an active speed limite
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::68824e5001136eb5fd00e4bd0dc9132a
https://doi.org/10.1080/15472450.2012.704340
https://doi.org/10.1080/15472450.2012.704340
Autor:
G. Yiu, M. Pearce, Daniel C. Murray, Robert Rogenmoser, Dongwook Suh, Zongjian Chen, S. Nishimoto, D. Rodriguez, V. von Kaenel, E. Supnet, M. Oyker
Publikováno v:
IEEE Journal of Solid-State Circuits. 38:1857-1865
The load/store pipe for a low-power 1-GHz embedded processor is described. For area savings and logic complexity reduction, the load/store pipe is clocked at twice the frequency of the processor core. It can sustain two load or store operations per c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fa174e9c105904d3d6f041efcc9ed15d
https://doi.org/10.1109/jssc.2003.818296
https://doi.org/10.1109/jssc.2003.818296
Autor:
J. Grodstein, Insung Kim, Daniel C. Murray, D. Bertucci, J. Burnette, A.J. Baum, R. Stepanian, V.R. van Kaenel, R. Wen, D. Souydalay, A. Spink, Amy K. Silveria, M. Pearce, A. Varadharajan, K. Broch, T. Broch, S. Santhanam, Kwong-Tak Chui, E. Chang, Daniel W. Dobberpuhl, M. Braganza, P. Donahue
Publikováno v:
IEEE Journal of Solid-State Circuits. 33:1829-1839
This paper describes the 300-MHz StrongARM 1500 microprocessor, which is capable of more than two billion 16-b operations per second. Starting with the original StrongARM 110 design, an attached media processor (AMP) has been integrated along with a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f8110a9bbe9af8e5e70ee8733f9d7675
https://doi.org/10.1109/4.726584
https://doi.org/10.1109/4.726584
Autor:
R. Witek, S.C. Thierauf, M. Pearce, P. Donahue, K. Snyder, Daniel C. Murray, G. Hoeppner, Elizabeth M. Cooper, P. Lin, Thomas H. Lee, L. Madden, S. Santhanam, J. Eno, J. Montanaro, A.J. Black, A. Farell, Daniel W. Dobberpuhl, R. Stephany, K. Anne, D. Kruckemyer
Publikováno v:
IEEE Journal of Solid-State Circuits. 31:1703-1714
This paper describes a 160 MHz 500 mW 32 b StrongARM(R) microprocessor designed for low-power, low-cost applications. The chip implements the ARM(R) V4 instruction set and is bus compatible with earlier implementations. The pin interface runs at 3.3
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9389192c87c82606779a5e2928ebfdcd
https://doi.org/10.1109/jssc.1996.542315
https://doi.org/10.1109/jssc.1996.542315
Publikováno v:
Effects of Psychoactive Chemicals on Commercial Driver Health and Performance: Stimulants, Hypnotics, Nutritional, and Other Supplements
This synthesis study identifies available information and research gaps relating to the use of chemical substances by commercial drivers and is intended to provide up-to-date information to inform decision makers about the near-, mid-, and long-range
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fadda28b8de329ea99c90bef2d9e7004
https://doi.org/10.17226/14534
https://doi.org/10.17226/14534
Publikováno v:
Safety Impacts of Speed Limiter Device Installations on Commercial Trucks and Buses
This synthesis examines and summarizes literature and industry information relating to speed limiters; exploring questions concerning measurable safety impacts, metrics, and degree of benefit, if any. Speed limiters, also described as speed governors
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::72b410d6dc51d5370dfbb7957500086f
https://doi.org/10.17226/14211
https://doi.org/10.17226/14211
Autor:
L. O'Donnell, V. Sundaresan, Brian J. Campbell, Tuan Do, G. Yee, R. Blake, Donald A. Priore, N. Bunger, Daniel C. Murray, E. Supnet, D. Kidd, Ingino Joseph M, D. Rodriguez, M. Pearce, G. Yiu, Sribalan Santhanam, Jong Lee, M. Carlson, K. Anne, V. von Kaenel, J. Cheng, C. Vo, Robert Rogenmoser, S. Nishimoto, R. Wen, Dongwook Suh, Zongjian Chen, David A. Kruckemyer, M. Panich, Daniel W. Dobberpuhl, M. Oykher, R. Allmon
Publikováno v:
2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).
The Broadcom BCM12500 is a high performance system on a chip (SOC) targeted at network centric tasks. The chip consists of two high performance SB-1 MIPS64/sup TM/ CPUs, a shared 512 KB L2 cache, a DDR memory controller, and integrated I/O. All major
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e3ecd1e71f24d74a85e5bf3a4ddc378b
https://doi.org/10.1109/vlsic.2001.934209
https://doi.org/10.1109/vlsic.2001.934209