Zobrazeno 1 - 2
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pro vyhledávání: '"Dandas Tang Dandas Tang"'
Publikováno v:
Proceedings of the IEEE Custom Integrated Circuits Conference.
This paper summarizes the implementation of IEEE 1149.1 test logic in Motorola ASIC Division's H4C SeriesTM of threelayer metal sub-micron (0.7 p effective channel length) CMOS gate arrays and advantages. The Boundary Scan Chain (BSC) logic and buffe
Autor:
Timothy W. Sutton, C. Kaplinsky, P. Holly, Wanhao Li, J. Vinh, Dandas Tang Dandas Tang, F. Zlotnick, R. Mao, P. Butler
Publikováno v:
Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.
The authors describe a PLD architecture that eliminates sense amp circuitry in a 22V10 device, resulting in zero quiescent current and dynamic power levels that are one quarter that of previous architectures while still achieving state-of-the-art swi