Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Dan Moy"'
Autor:
Zhuo-Jie (George) Wu, Ping-Chuan Wang, Seungman Choi, Patrick Justison, Martin Gall, Jae-Kyu Cho, Takako Hirokawa, Yusheng Bian, Thomas Houghton, Vaishnavi Karra, Dan Moy, Karen Nummy, Dave Riggs, Norman Robson, Ian Melville, Ken Giewont
Publikováno v:
2023 Optical Fiber Communications Conference and Exhibition (OFC).
We report a study on moisture effect on optical performance of monolithic silicon photonics technologies featuring V-grooves for self-aligned fiber attach. Chip-level hermetic sealing was achieved by implementing moisture barrier for the fiber couple
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dcd767f23601034fd88497781617e44b
https://doi.org/10.23919/ofc49934.2023.10116551
https://doi.org/10.23919/ofc49934.2023.10116551
Autor:
Yusheng Bian, Hanyi Ding, Abdelsalam Aboketaf, Vaishnavi Karra, Massimo Sorbara, Takako Hirokawa, Salman Mosleh, Chrystal Hedges, Won Suk Lee, Sujith Chandran, Avijit Chatterjee, Riddhi Nandi, Ken Giewont, Karen Nummy, Alon Gabbay, Yannick De Koninck, Jochem Verbist, Santiago Echeverri, Liron Gantz, Qidi Liu, Dylan Logan, Omid Jafari, Kyle Murray, Edgar Huante-Ceron, Subharup Roy, Paul Webster-Pact, Michal Rakowski, Kevin K. Dezfulian, Andy Stricker, Thomas Houghton, Keith Donegan, Ryan Sporer, Jae Kyu Cho, Farid Barakat, Dan Moy, Zhuo-Jie George Wu, Subramanian Krishnamurthy, Arman Najafi, Seyedeh Fahimeh Banihashemian, Rick Mincar, Ranjani Sirdeshmukh, Norm Robson, Ian Melville, Rod Augur, Jae Gon Lee, Wenhe Lin, George Gifford, Robert Fox, Vikas Gupta, Anthony Yu, John Pellerin, Ted Letavic
Publikováno v:
Optical Fiber Communication Conference (OFC) 2023.
We simulated and experimentally characterized the differential group delay induced from polarization mode dispersion (PMD) of key components on a monolithic SiPh platform. Strategy for compensating PMD was introduced for high-speed applications beyon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::04bf7fffff4f493a55a276bac2637d88
https://doi.org/10.1364/ofc.2023.th2a.24
https://doi.org/10.1364/ofc.2023.th2a.24
Autor:
Edmund Banghart, Subramanian S. Iyer, Norman Robson, Min Soo Han, Toshiaki Kirihata, Jason C. S. Woo, L. Jiang, Dan Moy, Faraz Khan, Robert Katz
Publikováno v:
IEEE Electron Device Letters. 40:1100-1103
The Charge Trap Transistor (CTT) technology is an emerging memory solution that turns as-fabricated high- ${k}$ /metal gate (HKMG) logic transistors into secure, embedded non-volatile memory (eNVM) elements with excellent data retention and operation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2cc5577b2a06cd1d2785955be11f6e30
https://doi.org/10.1109/led.2019.2919871
https://doi.org/10.1109/led.2019.2919871
Autor:
Michael Roberge, Darren L. Anand, Z. Chbili, L. Jiang, Balaji Jayaraman, Rajesh R. Tummuru, Edmund Banghart, Dan Moy, Toshiaki Kirihata, Matthew Deming, Robert Katz, John A. Fifield, Kevin Batson, Ramesh Raghavan, Faraz Khan, Dale Pontius, Amit Mishra, Alberto Cestero, Norman Robson, Eric D. Hunt-Schroeder, Mark Jacunski
Publikováno v:
IEEE Solid-State Circuits Letters. 1:233-236
An 8Kx192b charge trap transistor one time programmable memory (OTPM) is designed and manufactured in GLOBALFOUNDRIES 14-nm bulk FinFET technology without process adders or additional masks. A write timer state machine issues multicycle 192b parallel
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f52743c397c5350e7afc6865935a6e6b
https://doi.org/10.1109/lssc.2019.2899519
https://doi.org/10.1109/lssc.2019.2899519
Autor:
Alberto Cestero, Rajesh R. Tummuru, Toshiaki Kirihata, John Golz, Balaji Jayaraman, Ramesh Raghavan, Ming Yin, Thejas Kempanna, Subramanian S. Iyer, Dan Moy, Faraz Khan, Janakiraman Viraraghavan, Derek H. Leu
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:949-960
This paper describes the design and implementation of an 80-kb logic-embedded non-volatile multi-time programmable memory (MTPM) with no added process complexity. Charge trap transistors (CTTs) that exploit charge trapping and de-trapping behavior in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3bd1437e6f81cd53e5330aeb23239f0d
https://doi.org/10.1109/jssc.2017.2784760
https://doi.org/10.1109/jssc.2017.2784760
Autor:
Thejas Kempanna, Rajesh R. Tummuru, Ramesh Raghavan, Janakiraman Viraraghavan, Faraz Khan, Robert E. Kilker, Subramanian S. Iyer, Toshiaki Kirihata, Ming Yin, Derek H. Leu, Dan Moy, Alberto Cestero, John Golz, Balaji Jayaraman
Publikováno v:
VLSI Circuits
An 80Kb logic Embedded Multi-Time Programmable Memory (MTPM) employs charge trapping and de-trapping behavior in 32nm/22nm High-K transistor, resulting in no added process complexity. Multi-step verification with overwrite protection employs block-wr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0cbba329b90e50e1bb89bbc06ca221dd
https://doi.org/10.1109/vlsic.2016.7573462
https://doi.org/10.1109/vlsic.2016.7573462
Autor:
Dan Moy, B. Messenger, C. E. Tian, Chuck Le, Stephen Wu, Norman Robson, Chandrasekharan Kothandaraman, S. S. Iyer, John M. Safran
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 8:536-542
The reliability of NiPtSi/p-poly Si electrical fuses with different programming mechanisms, i.e., electromigration and thermal rupture, was investigated in terms of fuse resistance stability and fuse array functionality for the 65-nm technology node.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c9822b77eb6025c6ceeb61373f198506
https://doi.org/10.1109/tdmr.2008.2002349
https://doi.org/10.1109/tdmr.2008.2002349
Autor:
X. Chen, Derek H. Leu, D. Lea, T. Kirihata, Faraz Khan, J. B. Johnson, Dan Moy, Sami Rosenblatt, Norman Robson, Subramanian S. Iyer, Dimitris P. Ioannou, G. LaRosa, C. Kothandaraman
Publikováno v:
IRPS
We explore the use of oxygen vacancies for nonvolatile data storage by trapping electrons in the high-k, gate dielectric layer of NFETs. Programming is performed via channel carrier injection and is erased by tunneling. 64Kb arrays were constructed a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::72bbefa7cd94621b4282e9a2037e2073
https://doi.org/10.1109/irps.2015.7112816
https://doi.org/10.1109/irps.2015.7112816
Autor:
Chandrasekharan Kothandaraman, Alan J. Leslie, Deok-kee Kim, Gregory J. Fredeman, Dan Moy, Xiang Chen, Alberto Cestero, John M. Safran, T. Kirihata, Yan Zun Li, R. Rajeevakumar, Norman Robson, S. S. Iyer
Publikováno v:
2007 IEEE Symposium on VLSI Circuits.
Demonstrating a >10X density increase over traditional VLSI fuse circuits, a compact eFUSE programmable array memory configured as a 4 Kb one-time programmable ROM (OTPROM) is presented using a 6.2 mum2 NiSix silicide electromigration ITIR cell in 65
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::927cff597c5e4d9be2ceed644a5c3158
https://doi.org/10.1109/vlsic.2007.4342770
https://doi.org/10.1109/vlsic.2007.4342770
Autor:
Norman Robson, Alberto Cestero, Alan J. Leslie, Chandrasekharan Kothandaraman, Dan Moy, R. Rajeevakumar, John M. Safran, Xiang Chen, Subramanian S. Iyer, T. Kirihata
Publikováno v:
CICC
Electrical fuse (eFUSE) has become a popular choice to enable memory redundancy, chip identification and authentication, analog device trimming, and other applications. We will review the evolution and applications of electrical fuse solutions for 18
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c6b08ecafec5e9cdecee455157c2da3c
https://doi.org/10.1109/cicc.2007.4405850
https://doi.org/10.1109/cicc.2007.4405850