Zobrazeno 1 - 10
of 65
pro vyhledávání: '"Damaruganath Pinjala"'
Autor:
Tan Siow Pin, Damaruganath Pinjala, N. Khan, Toh Kok Chuan, Soon Wee Ho, V. Kripesh, John H. Lau, Li Hong Yu
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 3:221-228
In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c3a1785210b05c6745f8b8443b13eb2c
https://doi.org/10.1109/tcpmt.2012.2186297
https://doi.org/10.1109/tcpmt.2012.2186297
Autor:
Chi-Hsin Chiu, Wen-Sheng Lee, V. N. Sekhar, V. Kripesh, Ming Ching Jong, Carl Chen, Chih-Ming Huang, Damaruganath Pinjala, John H. Lau, Scott Chen, Soon Wee Ho, Chun-Chieh Chao, Aibin Yu, Chien-Feng Chan, Aditya Kumar, Wai Yin Hnin
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 1:1336-1344
Fabrication of high aspect ratio through silicon vias (TSVs) in a Si interposer and fine pitch solder microbumps on a top Si die is discussed in this paper. Chip stacking result of the Si interposer and the top Si die is also presented. TSVs with 25
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ead0c5b91a58bf78e4eb3cadd69e1104
https://doi.org/10.1109/tcpmt.2011.2155655
https://doi.org/10.1109/tcpmt.2011.2155655
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 1:1328-1335
With the most popular electronic products being the slimmest ones with the highest functionality, the ability to thin, stack, and interconnect chips is becoming more important. One method to accomplish this is by using the through silicon via (TSV).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f4a49054322a3d99be90222111b48c01
https://doi.org/10.1109/tcpmt.2011.2158002
https://doi.org/10.1109/tcpmt.2011.2158002
Autor:
C. S. Premachandran, Dim-Lee Kwong, Xiaowu Zhang, S. Gao, Siong Chiew Ong, Won Kyoung Choi, Yee Mong Khoo, Ranjan Rajoo, Ling Xie, Damaruganath Pinjala, Soon Wee Ho, C. S. Selvanayagam
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 1:510-518
Low-temperature bonds are thin intermetallic (IMC) bonds that are formed between devices when plated layers of different metals on each side of the component come into contact under relatively low temperature and high pressure. These joints, comprise
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc3758a8ee9cd5673dca2480b9cf848f
https://doi.org/10.1109/tcpmt.2011.2107511
https://doi.org/10.1109/tcpmt.2011.2107511
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 1:536-544
Demand for increased functionalities and the trend in product miniaturization have created new challenges for electronic packaging. The move to 3-D packages combines the benefits of small footprint packages and through-silicon-vias technology to over
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fc80e5f84dc37e2fb3124843de8c54cb
https://doi.org/10.1109/tcpmt.2010.2100710
https://doi.org/10.1109/tcpmt.2010.2100710
Autor:
C. S. Premachandran, V. Kripesh, Fa Xing Che, John H. Lau, S. C. Chong, Xiaowu Zhang, V. N. Sekhar, T. C. Chai, Leong Ching Wai, Damaruganath Pinjala, V Lee
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 1:299-309
Consumers' demands have driven the industry toward devices and packages with low cost, high performance, and multiple functions. Stacking two or more chips into one package becomes a popular choice. In this paper, the development of a three-die stack
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da60a63d5e071a3fe1d5a7fc07dd1097
https://doi.org/10.1109/tcpmt.2010.2100292
https://doi.org/10.1109/tcpmt.2010.2100292
Autor:
Siow Pin Tan, Damaruganath Pinjala, Ai Bin Yu, Kripesh Vaidyanathan, John H. Lau, Kok Chuan Toh, N. Khan, Gongyue Tang
Publikováno v:
IEEE Transactions on Components and Packaging Technologies. 33:184-195
In this paper, an integrated liquid cooling system for 3-D stacked modules with high dissipation level is proposed. The fluidic interconnects in this system are elaborated and the sealing technique for different fluid interfaces is discussed. Meanwhi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a73e556c6b4dda7e741887fcff7a983c
https://doi.org/10.1109/tcapt.2009.2033039
https://doi.org/10.1109/tcapt.2009.2033039
Autor:
N. Khan, G. Archit, Seung Wook Yoon, Aibin Yu, Vaidyanathan Kripesh, J.H. Lau, Kok Chuan Toh, Damaruganath Pinjala
Publikováno v:
IEEE Transactions on Components and Packaging Technologies. 32:566-571
This paper presents micro fabrication process and wafer-level integration of a silicon carrier, which consists of two Si chips that are bonded together with evaporated AuSn-solder. There are micro fins and channels fabricated in the Si chip and form
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7b1b27c2599c2d1fa5e2830abef22d56
https://doi.org/10.1109/tcapt.2009.2012719
https://doi.org/10.1109/tcapt.2009.2012719
Autor:
Kiyofumi Suzuki, P.V. Ramana, Teck Guan Lim, Bu-Sung Lee, Jing Li, H. Kuruveettil, J.L.H. Shing, K. Yamada, T. Shioda, K. Fujita, Damaruganath Pinjala
Publikováno v:
IEEE Transactions on Advanced Packaging. 32:509-516
We report the development of a low cost, simple optical/electrical circuit board (OECB) using multimode polymer waveguide on FR4 printed circuit board (PCB). The design of this OECB uses only a 45deg-ended waveguide to couple and decouple the optical
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8873b805d77f267823390ff9edecf109
https://doi.org/10.1109/tadvp.2009.2014246
https://doi.org/10.1109/tadvp.2009.2014246
Publikováno v:
Heat Transfer Engineering. 29:366-374
Boiling heat transfer enhancement for a passive electronics cooling design is presented in this paper. A novel pool boiling enhancement technique is developed and characterized. A combination of surface modification by metallic coating and micro-mach
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::990d26a3de4c2e8bb533b825fe099421
https://doi.org/10.1080/01457630701825481
https://doi.org/10.1080/01457630701825481