Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Dalia A. El-Dib"'
Publikováno v:
Microelectronics Journal. 65:11-20
Combined binary/decimal arithmetic is optimal in supporting binary and decimal high speed and low power applications. A low energy clock-gated pipelined dual base binary/decimal fixed-point multiplier is suggested extending a previously proposed non-
Publikováno v:
ICM
A simple low energy new lossless compression/decompression approach is suggested for main memory data for exact storage of critical applications that need precise outputs. The proposed design lowers energy consumption by up to 66% when compared to pr
Publikováno v:
ICM
The hardware implementation of a low power fuzzy control system for regulating the blood glucose level is suggested. The controller is designed in VHDL, synthesized for an Application Specific Integrated Circuit (ASIC) and then compared to the state
Publikováno v:
ICM
A design technique for an asynchronous Analog-to-Digital Converter (ADC) is presented. The proposed design retains a clockless level crossing sampling technique, and then applies a Wavelet Neural Network (WNN) technique. High-level simulation results
Publikováno v:
Journal of Circuits, Systems and Computers. 25:1650149
A low power operand decomposition multiplication architecture implementation is modified to further reduce its power dissipation and delay. First, the multiplier’s implementation was modified to generate the partial products using NAND gates instea
Fuzzy Control System for Regulating the Blood Glucose Level of Diabetes Patients Implemented on FPGA
Publikováno v:
Journal of Circuits, Systems and Computers. 25:1650161
The VHDL design and Field Programmable Gate Array (FPGA) implementation of a fuzzy control system to control the blood glucose level continuously based on current and previous values are presented. The design is based on simple models of the dynamic
Publikováno v:
2010 International Conference on Microelectronics.
Excessive leakage of cache blocks encourages forcing the cache block into low-leakage state all the time except during read/write operations. By retaining the values of the cache cells during low leakage state, the penalty for re-activating the sleep
Autor:
Dalia A. El-Dib
Publikováno v:
2010 53rd IEEE International Midwest Symposium on Circuits and Systems.
Leakage power reductions in active circuits have attracted researcher's attention for the last few years because of expectations of higher share of leakage power in total power consumption for downsized technologies. It was expected that leakage powe