Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Daisuke Kosaka"'
Autor:
Daisuke Kosaka, Hidenori Sato
Publikováno v:
Annals of Business Administrative Science, Vol 19, Iss 6, Pp 227-239 (2020)
Engagement as a concept is gaining attention in research and management practices. However, there are several types of engagement depending on whether the focus is on work and jobs or companies and organizations. In this paper, we demonstrate the fol
Externí odkaz:
https://doaj.org/article/d47a32c670bf4c17bd04db7bd3d5c579
Autor:
Hidenori Sato, Daisuke Kosaka
Publikováno v:
Annals of Business Administrative Science. 19:227-239
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1810fb5266c1b192c1e7c71afa313476
https://doi.org/10.7880/abas.0200911a
https://doi.org/10.7880/abas.0200911a
Autor:
Daisuke Kosaka, Makoto Nagata, Naoyuki Hamanishi, Daisuke Fujimoto, Ken Tanabe, Masazumi Shiochi, Tetsuro Matsuno
Publikováno v:
IEICE Transactions on Electronics. :820-826
An arbitrary noise generator (ANG) is based on time-series charging of divided parasitic capacitance (TSDPC) and emulates power supply noise generation in a CMOS digital circuit. A prototype ANG incorporates an array of 32 x 32 6-bit TSDPC cells alon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::568d7397398c4bdc5859c7cb75261ee2
https://doi.org/10.1587/transele.e93.c.820
https://doi.org/10.1587/transele.e93.c.820
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :440-447
Capacitance charging modeling efficiently captures power supply currents in dynamic operations of a CMOS digital circuit and accurately expresses their interaction with on- and off-chip impedance networks. Derivation of such models is generally defin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b814ee540c350a25b825fbef00551fef
https://doi.org/10.1587/transfun.e93.a.440
https://doi.org/10.1587/transfun.e93.a.440
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :2651-2660
Chip-level substrate coupling analysis uses F-matrix computation with slice-and-stack execution to include highly concentrated substrate resistivity gradient. The technique that has been applied to evaluation of device-level isolation structures agai
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4786698006327312f524a0c488803d7c
https://doi.org/10.1093/ietfec/e90-a.12.2651
https://doi.org/10.1093/ietfec/e90-a.12.2651
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :380-387
Substrate-coupling equivalent circuits can be derived for arbitrary isolation structures by F-matrix computation. The derived netlist represents a unified impedance network among multiple sites on a chip surface as well as internal nodes of isolation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ba3886b2d84b590f704f0b6f1425d0af
https://doi.org/10.1093/ietfec/e90-a.2.380
https://doi.org/10.1093/ietfec/e90-a.2.380
Publikováno v:
Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::946df43e9212bda4490d95b6a1ed94c7
https://doi.org/10.7567/ssdm.2009.d-7-1
https://doi.org/10.7567/ssdm.2009.d-7-1
Autor:
Yoji Bando, Goichi Yokomizo, Makoto Nagata, Kunihiko Tsuboi, Ying Shiun Li, Daisuke Kosaka, Shen Lin
Publikováno v:
CICC
A fully integrated framework of full-chip power and substrate noise analysis is discussed, featuring description of transistor-level custom circuits as dynamic noise sources, a high capacity solver for chip-level substrate coupling, and noise back an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2cb04a0bb76a80b1e681a8b2d7178104
https://doi.org/10.1109/cicc.2009.5280883
https://doi.org/10.1109/cicc.2009.5280883
Autor:
Naoyuki Hamanishi, Ken Tanabe, Daisuke Kosaka, Daisuke Fujimoto, Makoto Nagata, Tetsuro Matsuno, Masazumi Shiochi
Publikováno v:
CICC
An arbitrary noise generator (ANG) is based on time-series charging of divided parasitic capacitance (TSDPC) and emulates power supply noise generation in a CMOS digital circuit. A prototype ANG incorporates an array of 32 × 32 6-bit TSDPC cells alo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37f0165a2ab62c05d1c44d8b3c9d29ef
https://doi.org/10.1109/cicc.2009.5280875
https://doi.org/10.1109/cicc.2009.5280875
Publikováno v:
CICC
Slice-and-stack representation of a vertical substrate impurity profile in F-matrix computation captures isolation effects of deep N-wells as well as guard rings in chip-level substrate coupling. A reference flow of substrate noise analysis combines
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ad49f397674eb36327a19bfe0556f99
https://doi.org/10.1109/cicc.2007.4405861
https://doi.org/10.1109/cicc.2007.4405861