Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Daiki Oki"'
Autor:
Cong Bing Li, Nobuo Takahashi, Seiichi Banba, Masataka Kamiyama, Haruo Kobayashi, Satoru Kawauchi, Daiki Oki, Toru Dan
Publikováno v:
Key Engineering Materials. 698:142-148
This paper describes multi-band low noise amplifiers (LNAs) utilizing input matching transformers. We investigate a conventional dual-band LNA circuit utilizing a transformer, and show our analysis and simulation results for its circuit. Based on thi
Autor:
Toru Dan, Nobuo Takahashi, Satoru Kawauchi, Seiichi Banba, Masataka Kamiyama, Cong Bing Li, Haruo Kobayashi, Daiki Oki
Publikováno v:
Key Engineering Materials. 643:109-116
This paper presents a power-efficient noise-canceling technique based on the feed-forward amplifiers, considering a fundamental tradeoff between noise figure (NF) and power consumption in the design of wide-band amplifiers. By suppressing the input s
Autor:
Tatsuji Matsuura, Osamu Kobayashi, Yohei Tan, Haruo Kobayashi, Li Quan, Yukiko Arai, Zhi Xiang Yang, Nobukazu Takai, Zachary Nosker, Daiki Oki, Yu Liu, Kiichi Niitsu, Atsuhiro Katayama, En Si Li
Publikováno v:
Key Engineering Materials. 596:181-186
This paper proposes a digital self-calibration technique for pipelined ADC. In this technique, the pipelined ADC is composed of a series of cyclic ADCs and each stage has independent digital self-calibration. Because of this, our technique achieves h
Autor:
Daiki Oki, Naohiro Harigai, Daiki Hirabayashi, Masato Sakurai, Takahiro Yamaguchi, Haruo Kobayashi, Kiichi Niitsu
Publikováno v:
Key Engineering Materials. 534:197-205
This work presents the analytical study on jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements. Jitter accumulation in phase frequency detector degrades the accuracy of on-chip jitter measurement
Autor:
Naohiro Harigai, Haruo Kobayashi, Masato Sakurai, Kiichi Niitsu, O. Kobayashi, Takao Yamaguchi, Daiki Hirabayashi, Daiki Oki
Publikováno v:
ASP-DAC
Design of a clock jitter reduction circuit that exploits the phase blending technique between the uncorrelated clock edges that are self-delayed by multiples of the clock cycle, nT is presented. By blending uncorrelated clock edges, the output clock
Autor:
Masato Sakurai, Naohiro Harigai, Kiichi Niitsu, Takahiro Yamaguchi, Haruo Kobayashi, Daiki Oki, Daiki Hirabayashi
Publikováno v:
ISOCC
This work presents the analysis of jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements. Jitter accumulation in phase frequency detector degrades the accuracy of on-chip jitter measurements, and r
Publikováno v:
Extended Abstracts of the 2011 International Conference on Solid State Devices and Materials.