Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Daiguo Xu"'
Publikováno v:
Electronics Letters, Vol 52, Iss 9, Pp 740-742 (2016)
A high DC gain self‐cascode structure of operational transconductance amplifier (OTA) design with bandwidth enhancement is proposed. Based on the concept of self‐cascode structure, which provides high output resistance and transconductance, the p
Externí odkaz:
https://doaj.org/article/21b9c8cc1bb54076a08db8a2835efaaf
Publikováno v:
Analog Integrated Circuits and Signal Processing. 102:403-413
This paper presents a 12-bit 120-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with improved split capacitive DAC and low-noise dynamic comparator. A split DAC structure with parasitic capacitance depressed technique
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8633616c4d906fe81cf81a651fa19754
https://doi.org/10.1007/s10470-019-01581-0
https://doi.org/10.1007/s10470-019-01581-0
Publikováno v:
Microelectronics Journal. 128:105572
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ab5490a3fcfd48802caa7102523a7dc6
https://doi.org/10.1016/j.mejo.2022.105572
https://doi.org/10.1016/j.mejo.2022.105572
Publikováno v:
2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA).
A source-follower (SF) based differential input buffer for high speed ADCs, in which an auxiliary SF pair and a current amplifier pairs generate a differential compensation current injecting into the main SF pair to achieve linearization is presented
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::387a7ad06713d339a9b228b134490dcf
https://doi.org/10.1109/icta50426.2020.9332138
https://doi.org/10.1109/icta50426.2020.9332138
Autor:
Zongming Duan, Dongfang Pan, Bowen Wu, Yan Wang, Bingbing Liao, Dong Huang, Yanhui Wu, Daiguo Xu, Hua Xu, Wei Lv, Yuefei Dai, Pei Li, Fujiang Lin
Publikováno v:
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
A fully-integrated 76-81GHz FMCW transceiver in 65-CMOS is presented for automotive radar applications. The transceiver consists of 3-transmiter, 4-receiver, FMCW synthesizer and ADC with decimation filters. The transmitter, with a TX chain including
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fbb2fbe87c3db2ef949ef9ec4e62ad8
https://doi.org/10.1109/rfic.2019.8701731
https://doi.org/10.1109/rfic.2019.8701731
Publikováno v:
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
A power- and area-efficient time-interleaved ADC employs eight successive-approximation-register (SAR) time-interleaved channels along with a new timing mismatch detection algorithm. The digital background calibration technique suppresses the inter-c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::69f98e4d6dfef12ec4c8e741244b2c04
https://doi.org/10.1109/icsict.2016.7998772
https://doi.org/10.1109/icsict.2016.7998772
Publikováno v:
Journal of Semiconductors. 38:045003
A 10-bit 110 MHz SAR ADC with asynchronous trimming is presented. In this paper, a high linearity sampling switch is used to produce a constant parasitical barrier capacitance which would not change with the range of input signals. As a result, the l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a20617413c689fa36af21d13ea5b9206
https://doi.org/10.1088/1674-4926/38/4/045003
https://doi.org/10.1088/1674-4926/38/4/045003
Publikováno v:
Electronics Letters (Wiley-Blackwell). 7/7/2016, Vol. 52 Issue 14, p1207-1209. 2p. 2 Diagrams, 1 Chart.
Publikováno v:
Electronics Letters (Wiley-Blackwell). 11/5/2015, Vol. 51 Issue 23, p1914-1916. 2p. 2 Diagrams, 1 Chart, 3 Graphs.
Publikováno v:
2014 IEEE International Conference on Electron Devices & Solid-State Circuits; 2014, p1-2, 2p